Mesa (master): i965: Reduce the SIMD8 GS push constant threshold from 32 to 24.

[Kenneth Graunke]

Module: Mesa
Branch: master
Commit: 607fb0f13df8e328ed5d173c98fc250449c55aee
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=607fb0f13df8e328ed5d173c98fc250449c55aee

Author: Kenneth Graunke <kenneth at whitecape.org>
Date:   Mon May  9 18:11:00 2016 -0700

i965: Reduce the SIMD8 GS push constant threshold from 32 to 24.

Three Shadow of Mordor geometry shaders increase by a single
instruction, but the number of spills/fills in Orbital Explorer
is reduced from 194:1279 -> 82:454.  No other programs are affected.

Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen at intel.com>

---

 src/mesa/drivers/dri/i965/brw_fs.cpp | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp
index 2a542b8..89b30c7 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
@@ -5229,8 +5229,8 @@ fs_visitor::setup_gs_payload()
       payload.num_regs++;
    }
 
-   /* Use a maximum of 32 registers for push-model inputs. */
-   const unsigned max_push_components = 32;
+   /* Use a maximum of 24 registers for push-model inputs. */
+   const unsigned max_push_components = 24;
 
    /* If pushing our inputs would take too many registers, reduce the URB read
     * length (which is in HWords, or 8 registers), and resort to pulling.