Mesa (master): nv50/ir: Handle TGSI_OPCODE_CLOCK

[Ilia Mirkin]

Module: Mesa
Branch: master
Commit: 6c3dd8f0ed020f3009153ea8058f0b9340823a41
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=6c3dd8f0ed020f3009153ea8058f0b9340823a41

Author: Boyan Ding <boyan.j.ding at gmail.com>
Date:   Tue Apr  4 22:44:46 2017 +0800

nv50/ir: Handle TGSI_OPCODE_CLOCK

Signed-off-by: Boyan Ding <boyan.j.ding at gmail.com>
[imirkin: make zero mov non-fixed]
Reviewed-by: Ilia Mirkin <imirkin at alum.mit.edu>

---

 src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp
index 1e2f6111fc..3ed7d345c4 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp
@@ -3404,6 +3404,13 @@ Converter::handleInstruction(const struct tgsi_full_instruction *insn)
          mkCvt(OP_CVT, TYPE_U32, dst0[c], TYPE_U8, val0);
       }
       break;
+   case TGSI_OPCODE_CLOCK:
+      // Stick the 32-bit clock into the high dword of the logical result.
+      if (!tgsi.getDst(0).isMasked(0))
+         mkOp1(OP_MOV, TYPE_U32, dst0[0], zero);
+      if (!tgsi.getDst(0).isMasked(1))
+         mkOp1(OP_RDSV, TYPE_U32, dst0[1], mkSysVal(SV_CLOCK, 0))->fixed = 1;
+      break;
    case TGSI_OPCODE_KILL_IF:
       val0 = new_LValue(func, FILE_PREDICATE);
       mask = 0;