Mesa (17.3): 36 new commits

Emil Velikov evelikov at kemper.freedesktop.org
Mon Dec 4 08:58:27 UTC 2017


URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=30abe7dfaeba73406d63ef54f36969d0e75f83af
Author: Emil Velikov <emil.velikov at collabora.com>
Date:   Mon Dec 4 08:50:46 2017 +0000

    Update version to 17.3.0-rc6
    
    Signed-off-by: Emil Velikov <emil.velikov at collabora.com>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=5ac9d91ee3d897016d54e970a977c3fbbbe2488e
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date:   Wed Nov 29 16:22:42 2017 -0800

    i965: Disable regular fast-clears (CCS_D) on gen9+
    
    This partially reverts commit 3e57e9494c2279580ad6a83ab8c065d01e7e634e
    which caused a bunch of GPU hangs on several Source titles.  To date, we
    have no clue why these hangs are actually happening.  This undoes the
    final effect of 3e57e9494c227 and gets us back to not hanging.  Tested
    with Team Fortress 2.
    
    Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
    Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102435
    Fixes: 3e57e9494c2279580ad6a83ab8c065d01e7e634e
    Cc: mesa-stable at lists.freedesktop.org
    (cherry picked from commit ee57b15ec764736e2d5360beaef9fb2045ed0f68)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=4eae5b39eee45ee9ec58634764a9d2376872d5c8
Author: Vinson Lee <vlee at freedesktop.org>
Date:   Tue Nov 28 23:16:58 2017 -0800

    anv: Check if memfd_create is already defined.
    
    Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103909
    Signed-off-by: Vinson Lee <vlee at freedesktop.org>
    Reviewed-by: Eric Engestrom <eric.engestrom at imgtec.com>
    (cherry picked from commit 8c1e4b1afc8d396ccf99c725c59b29a9aa305557)
    [Emil Velikov: drop NA hunks]
    Signed-off-by: Emil Velikov <emil.velikov at collabora.com>
    
    Conflicts:
    	configure.ac
    	meson.build
    	src/intel/vulkan/anv_allocator.c

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=4e84aaa906e7abf41b170146dd7ef3e7a76820b9
Author: Vadym Shovkoplias <vadym.shovkoplias at globallogic.com>
Date:   Mon Nov 27 12:15:13 2017 +0200

    intel/blorp: Fix possible NULL pointer dereferencing
    
    Fix incomplete check of input params in blorp_surf_convert_to_uncompressed()
    which can lead to NULL pointer dereferencing.
    
    Fixes: 5ae8043fed2 ("intel/blorp: Add an entrypoint for doing
    bit-for-bit copies")
    Fixes: f395d0abc83 ("intel/blorp: Internally expose
    surf_convert_to_uncompressed")
    Reviewed-by: Emil Velikov <emli.velikov at collabora.com>
    Reviewed-by: Andres Gomez <agomez at igalia.com>
    
    (cherry picked from commit cdb3eb7174f84f3200408c4b43c819fb093da9c6)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=bcd4f26b41c97991d1268c308c15c350bd1da318
Author: Kenneth Graunke <kenneth at whitecape.org>
Date:   Tue Nov 28 08:58:21 2017 -0800

    i965: Reorganize batch/state BO fields into a 'brw_growing_bo' struct.
    
    We're about to add more of them, and need to pass the whole lot of them
    around together when growing them.  Putting them in a struct makes this
    much easier.
    
    brw->batch.batch.bo is a bit of a mouthful, but it's nice to have things
    labeled 'batch' and 'state' now that we have multiple buffers.
    
    Fixes: 2dfc119f22f257082ab0 "i965: Grow the batch/state buffers if we need space and can't flush."
    Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103101
    Reviewed-by: Ian Romanick <ian.d.romanick at intel.com>
    (cherry picked from commit 74e38739ca266b8178eaa70e30578aa929b067ab)
    [Emil Velikov: remove NA blorp_get_surface_base_address hunk]
    Signed-off-by: Emil Velikov <emil.velikov at collabora.com>
    
    Conflicts:
    	src/mesa/drivers/dri/i965/genX_blorp_exec.c

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=447afbf31b1bdbfc8cb03cfddeef0373cd291cf4
Author: Kenneth Graunke <kenneth at whitecape.org>
Date:   Tue Nov 28 08:20:39 2017 -0800

    i965: Don't grow batch/state buffer on every emit after an overflow.
    
    Once we reach the intended size of the buffer (BATCH_SZ or STATE_SZ), we
    try and flush.  If we're not allowed to flush, we resort to growing the
    buffer so that there's space for the data we need to emit.
    
    We accidentally got the threshold wrong.  The first non-wrappable call
    beyond (e.g.) STATE_SZ would grow the buffer to floor(1.5 * STATE_SZ),
    The next call would see we were beyond STATE_SZ and think we needed to
    grow a second time - when the buffer was already large enough.
    
    We still want to flush when we hit STATE_SZ, but for growing, we should
    use the actual size of the buffer as the threshold.  This way, we only
    grow when actually necessary.
    
    v2: Simplify the control flow (suggested by Jordan)
    
    Fixes: 2dfc119f22f257082ab0 "i965: Grow the batch/state buffers if we need space and can't flush."
    Reviewed-by: Jordan Justen <jordan.l.justen at intel.com>
    (cherry picked from commit ca4361658635f2b401e9793c0b982721998ecb70)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=09f6bd5ef27c1b16b1468441b070b60c2d57523d
Author: Kenneth Graunke <kenneth at whitecape.org>
Date:   Tue Nov 28 08:59:07 2017 -0800

    i965: Preserve EXEC_OBJECT_CAPTURE when growing the BO.
    
    The original state buffer was marked with EXEC_OBJECT_CAPTURE.  When
    growing it, we want to preserve that flag so we continue to capture it
    in GPU hang reports.
    
    Fixes: 2dfc119f22f257082ab0 "i965: Grow the batch/state buffers if we need space and can't flush."
    Reviewed-by: Ian Romanick <ian.d.romanick at intel.com>
    (cherry picked from commit 52d32917e1f3f70abcbcff5508f7423e94626b41)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=a49b70d2ec36f6a420801c41704d9b4d58b57c17
Author: Kenneth Graunke <kenneth at whitecape.org>
Date:   Tue Nov 28 08:30:50 2017 -0800

    i965: Use old_bo->align when growing batch/state buffer instead of 4096.
    
    The intention here is make the new BO use the same alignment as the old
    BO.  This isn't strictly necessary, but we would have to update the
    'alignment' field in the validation list when swapping it out, and we
    don't bother today.
    
    The batch and state buffers use an alignment of 4096, so this should be
    equivalent - it's just clearer than cut and pasting a magic constant.
    
    Fixes: 2dfc119f22f257082ab0 "i965: Grow the batch/state buffers if we need space and can't flush."
    Reviewed-by: Ian Romanick <ian.d.romanick at intel.com>
    Reviewed-by: Jordan Justen <jordan.l.justen at intel.com>
    (cherry picked from commit 2af70854609509adf5dc92af2fcf1c30938e2a5d)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=f1050f0435aff6956dacf7ea9373b841984c6baf
Author: Kenneth Graunke <kenneth at whitecape.org>
Date:   Wed Nov 29 00:27:18 2017 -0800

    i965: Program the dynamic state heap size to MAX_STATE_SIZE.
    
    STATE_BASE_ADDRESS specifies a maximum size of the dynamic state
    section, beyond which data supposedly reads back as 0.  On Gen8+,
    we were programming it to the size of the buffer.  This worked fine
    until we started growing the state buffer in commit 2dfc119f22f25708.
    When the state buffer grows, the value in STATE_BASE_ADDRESS becomes
    too small, and our state beyond STATE_SZ bytes would read back as 0.
    
    To avoid having to update the value, we program it to MAX_STATE_SIZE.
    We used to program the upper bound to the maximum on older hardware
    anyway, so programming it too large isn't a big deal.
    
    Bogus SURFACE_STATE can easily lead to GPU hangs and misrendering.
    DiRT Rally was hitting the statebuffer growth path, and suffered from
    bad texture corruption and GPU hangs (usually around the same time).
    
    This patch fixes both issues.
    
    Fixes: 2dfc119f22f257082ab0 "i965: Grow the batch/state buffers if we need space and can't flush."
    Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103101
    Tested-by: Jordan Justen <jordan.l.justen at intel.com>
    Reviewed-by: Chris Wilson <chris at chris-wilson.co.uk>
    Reviewed-by: Jordan Justen <jordan.l.justen at intel.com>
    Reviewed-by: Jason Ekstrand <jason at jlekstrand.net>
    (cherry picked from commit cfc5af588cf8e0cfb41ea907a7da3cca676be1c2)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=14e528b2db7338099e7c8d4f9921228ce949fb05
Author: Marek Olšák <marek.olsak at amd.com>
Date:   Thu Nov 30 02:16:29 2017 +0100

    radeonsi/gfx9: fix importing shared textures with DCC
    
    VI has 11 dwords at least. GFX9 has 10 dwords.
    
    Cc: 17.2 17.3 <mesa-stable at lists.freedesktop.org>
    Reviewed-by: Nicolai Hähnle <nicolai.haehnle at amd.com>
    (cherry picked from commit ed4780383cae61e051b3d3d120649222da49feae)
    [Emil Velikov: s|radeon/r600_texture.c|radeonsi/si_state.c|]
    Signed-off-by: Emil Velikov <emil.velikov at collabora.com>
    
    Conflicts:
    	src/gallium/drivers/radeon/r600_texture.c

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=c846d72523215261a0bd2dfbbd8875c7809b93bc
Author: Frank Richter <frank.richter at dynardo.de>
Date:   Tue Oct 17 10:34:27 2017 +0200

    gallium/wgl: fix default pixel format issue
    
    When creating a context without SetPixelFormat() don't blindly take the
    pixel format reported by GDI. Instead, look for our own closest pixel
    format.
    
    Minor clean-ups added by Brian Paul.
    
    Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103412
    Reviewed-by: Brian Paul <brianp at vmware.com>
    Tested-by: Brian Paul <brianp at vmware.com>
    (cherry picked from commit bf41b2b2627aa3790d380092c28c5d3395cc9cde)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=56993f4b8a40e4fa55e97788091aaf09a8d22482
Author: Roland Scheidegger <sroland at vmware.com>
Date:   Wed Nov 22 03:11:33 2017 +0100

    r600: set DX10_CLAMP for compute shader too
    
    I really intended to set this for all shader stages by
    3835009796166968750ff46cf209f6d4208cda86 but missed it for compute shaders
    (because it's in a different source file...).
    
    Reviewed-by: Dave Airlie <airlied at redhat.com>
    (cherry picked from commit 71e630753ebbee82e8f8709da5488296b2c070c8)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=9b2c27a39e096a49e9a1ea4aeb70b688a239ef23
Author: Roland Scheidegger <sroland at vmware.com>
Date:   Thu Nov 9 19:41:29 2017 +0100

    r600: use DX10_CLAMP bit in shader setup
    
    The docs are not very concise in what this really does, however both
    Alex Deucher and Nicolai Hähnle suggested this only really affects instructions
    using the CLAMP output modifier, and I've confirmed that with the newly
    changed piglit isinf_and_isnan test.
    So, with this bit set, if an instruction has the CLAMP modifier bit (which
    clamps to [0,1]) set, then NaNs will be converted to zero, otherwise the result
    will be NaN.
    D3D10 would require this, glsl doesn't have modifiers (with mesa
    clamp(x,0,1) would get converted to such a modifier) coupled with a
    whatever-floats-your-boat specified NaN behavior, but the clamp behavior
    should probably always be used (this also matches what a decomposition into
    min(1.0, max(x, 0.0)) would do, if min/max also adhere to the ieee spec of
    picking the non-nan result).
    Some apps may in fact rely on this, as this prevents misrenderings in
    This War of Mine since using ieee muls
    (ce7a045feeef8cad155f1c9aa07f166e146e3d00), without having to use clamped
    rcp opcode, which would also fix this bug there.
    radeonsi also seems to set this bit nowadays if I see that righ (albeit the
    llvm amdgpu code comment now says "Make clamp modifier on NaN input returns 0"
    instead of "Do not clamp NAN to 0" since it was changed, which also looks
    a bit misleading).
    
    v2: set it in all shader stages.
    
    Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103544
    
    Reviewed-by: Dave Airlie <airlied at redhat.com>
    (cherry picked from commit 3835009796166968750ff46cf209f6d4208cda86)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=6954eb1a2a3fc14ced5355f7b0fcf28634e4bb34
Author: Roland Scheidegger <sroland at vmware.com>
Date:   Thu Nov 9 19:37:54 2017 +0100

    r600: use min_dx10/max_dx10 instead of min/max
    
    I believe this is the safe thing to do, especially ever since the driver
    actually generates NaNs for muls too.
    The ISA docs are not very helpful here, however the dx10 versions will pick
    a non-nan result over a NaN one (this is also the ieee754 behavior), whereas
    the non-dx10 ones will pick the NaN (verified by newly changed piglit
    isinf-and-isnan test).
    Other "modern" drivers will most likely do the same.
    This was shown to make some difference for bug 103544, albeit it is not
    required to fix it.
    
    Reviewed-by: Dave Airlie <airlied at redhat.com>
    (cherry picked from commit aab0bfc648bf1be50b81a25224970015f1dc78b8)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=b79e15b08699ecf8d2f67eecff46f1c8b7d9b577
Author: Nicolai Hähnle <nicolai.haehnle at amd.com>
Date:   Tue Aug 1 12:44:34 2017 +0200

    glsl: fix interpolateAtXxx(some_vec[idx], ...) with dynamic idx
    
    The dynamic index of a vector (not array!) is lowered to a sequence of
    conditional assignments. However, the interpolate_at_* expressions
    require that the interpolant is an l-value of a shader input.
    
    So instead of doing conditional assignments of parts of the shader input
    and then interpolating that (which is nonsensical), we interpolate the
    entire shader input and then do conditional assignments of the interpolated
    result.
    
    Reviewed-by: Timothy Arceri <tarceri at itsqueeze.com>
    (cherry picked from commit ca63a5ed3e9efb2bd645b425f7393089f4e132a6)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=77cba992c39de3f5dfb76f1b93dc0d77f3bc8a04
Author: Nicolai Hähnle <nicolai.haehnle at amd.com>
Date:   Wed Jun 14 12:43:10 2017 +0200

    glsl: allow any l-value of an input variable as interpolant in interpolateAt*
    
    The intended rule has been clarified in GLSL 4.60, Section 8.13.2
    (Interpolation Functions):
    
       "For all of the interpolation functions, interpolant must be an l-value
        from an in declaration; this can include a variable, a block or
        structure member, an array element, or some combination of these.
        Component selection operators (e.g., .xy) may be used when specifying
        interpolant."
    
    For members of interface blocks, var->data.must_be_shader_input must be
    determined on-the-fly after lowering interface blocks, since we don't want
    to disable varying packing for an entire block just because one input in it
    is used in interpolateAt*.
    
    v2: keep setting must_be_shader_input in ast_function (Ian)
    v3: follow the relaxed rule of GLSL 4.60
    v4: only apply the relaxed rules to desktop GL
        (the ES WG decided that the relaxed rules may apply in a future version
         but not retroactively; see also
         dEQP-GLES31.functional.shaders.multisample_interpolation.interpolate_at_centroid.negative.*)
    
    Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101378
    Reviewed-by: Ian Romanick <ian.d.romanick at intel.com> (v1)
    Reviewed-by: Timothy Arceri <tarceri at itsqueeze.com>
    (cherry picked from commit 4f42450b86ea30f9228309e02ca68755c389866f)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=88fd81d3a3c74c877c20924875ac240fe74d7b73
Author: Kenneth Graunke <kenneth at whitecape.org>
Date:   Sat Nov 25 16:59:27 2017 -0800

    i965: Fix Smooth Point Enables.
    
    We want to program the 3DSTATE_RASTER field to the gl_context value,
    not the other way around.
    
    Fixes: 13ac46557ab1 (i965: Port Gen8+ 3DSTATE_RASTER state to genxml.)
    
    Reviewed-by: Jason Ekstrand <jason at jlekstrand.net>
    Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
    (cherry picked from commit 760e0156dfd5cf0281bc964a8090c792fc44ab16)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=f7687449701b4e08c3a96a765f6425677a1b4c67
Author: Nicolai Hähnle <nicolai.haehnle at amd.com>
Date:   Fri Nov 17 20:01:50 2017 +0100

    st_glsl_to_tgsi: check for the tail sentinel in merge_two_dsts
    
    This fixes yet another case where DFRACEXP has only one destination. Found
    by address sanitizer.
    
    Fixes tests/spec/arb_gpu_shader_fp64/execution/built-in-functions/fs-frexp-dvec4-only-mantissa.shader_test
    
    Fixes: 3b666aa74795 ("st/glsl_to_tgsi: fix DFRACEXP with only one destination")
    Acked-by: Marek Olšák <marek.olsak at amd.com>
    (cherry picked from commit 7e35bdad1c67d7df2832ac4b39bff471e83812e5)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=1e908f5035a84684798f270b500561f0d9290635
Author: Marek Olšák <marek.olsak at amd.com>
Date:   Tue Nov 28 20:57:10 2017 +0100

    radeonsi: fix layered DCC fast clear
    
    Cc: 17.2 17.3 <mesa-stable at lists.freedesktop.org>
    Reviewed-by: Nicolai Hähnle <nicolai.haehnle at amd.com>
    (cherry picked from commit 6863651bbdd7dcfad60bae78d1e17898f49ca08b)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=9777d08e573d229b8b221fc5b9c7797cfb713ba0
Author: Dave Airlie <airlied at redhat.com>
Date:   Sun Nov 26 23:36:39 2017 +0000

    r600/sb: handle jump after target to end of program. (v2)
    
    This fixes hangs on cayman with
    tests/spec/arb_tessellation_shader/execution/trivial-tess-gs_no-gs-inputs.shader_test
    
    This has a single if/else in it, and when this peephole activated,
    it would set the jump target to NULL if there was no instruction
    after the final POP. This adds a NOP if we get a jump in this case,
    and seems to fix the hangs, so we have a valid target for the ELSE
    instruction to go to, instead of 0 (which causes infinite loops).
    
    v2: update last_cf correctly. (I had some other patches hide this)
    
    Cc: <mesa-stable at lists.freedesktop.org>
    Signed-off-by: Dave Airlie <airlied at redhat.com>
    (cherry picked from commit 579ec9c311eb5176054b624f39c5c024605b58d6)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=aa4b1e71cbe481f198c57de4fa74f43e00a7c6c1
Author: Ben Crocker <bcrocker at redhat.com>
Date:   Mon Nov 27 14:44:59 2017 -0500

    docs/llvmpipe.html: Minor edits
    
    Language and spelling fixups in three places.
    
    Cc: "17.2" "17.3" <mesa-stable at lists.freedesktop.org>
    Signed-off-by: Ben Crocker <bcrocker at redhat.com>
    Reviewed-by: Eric Engestrom <eric.engestrom at imgtec.com>
    
    [Eric: move two fixes from the other patch to this one.]
    Signed-off-by: Eric Engestrom <eric.engestrom at imgtec.com>
    (cherry picked from commit b43daf7bf6cb505ece025c718ac6f074c38b2d49)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=3dc6072e3d6b127947dc8a72e3cca035e034c19d
Author: Kai Wasserbäch <kai at dev.carbon-project.org>
Date:   Thu Nov 16 12:58:50 2017 +0100

    docs: Point to apt.llvm.org for development snapshot packages
    
    Signed-off-by: Kai Wasserbäch <kai at dev.carbon-project.org>
    Reviewed-by: Eric Engestrom <eric.engestrom at imgtec.com>
    (cherry picked from commit d25123e23a77e216b45f8e1a83ac32805b07be82)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=a34ad6f363acbdb173f8e378b3cad557daa62378
Author: Tapani Pälli <tapani.palli at intel.com>
Date:   Mon Nov 20 15:00:19 2017 +0200

    mesa/gles: adjust internal format in glTexSubImage2D error checks
    
    When floating point textures are created on OpenGL ES 2.0, driver
    is free to choose used internal format. Mesa makes this decision in
    adjust_for_oes_float_texture. Error checking for glTexImage2D properly
    checks that sized formats are not used. We use same error checking
    path for glTexSubImage2D (since there is lot of overlap), however since
    those checks include internalFormat checks, we need to pass original
    internalFormat passed by the client. Patch adds oes_float_internal_format
    that does reverse adjust_for_oes_float_texture to get that format.
    
    Fixes following test failure:
       ES2-CTS.gtf.GL2ExtensionTests.texture_float.texture_float
    
    (when running test with MESA_GLES_VERSION_OVERRIDE=2.0)
    
    Signed-off-by: Tapani Pälli <tapani.palli at intel.com>
    Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103227
    Cc: "17.3" <mesa-stable at lists.freedesktop.org>
    Reviewed-by: Matt Turner <mattst88 at gmail.com>
    (cherry picked from commit 1e508e10d9ae649bfe5ab7b1842993be50052b21)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=4bbc0f366a8a3682678ba49c8f80b2fadb42715b
Author: Emil Velikov <emil.velikov at collabora.com>
Date:   Thu Nov 23 18:51:14 2017 +0000

    gl_table.py: add extern C guard for the generated glapitable.h
    
    The header can be included from C++, hence contents should have
    appropriate notation.
    
    Cc: mesa-stable at lists.freedesktop.org
    Cc: Dylan Baker <dylan at pnwbakers.com>
    Signed-off-by: Emil Velikov <emil.velikov at collabora.com>
    Reviewed-by: Eric Engestrom <eric.engestrom at imgtec.com>
    (cherry picked from commit c7616ac06973a80c3c6e9def49a3fa6606ba6097)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=86b35a990195af1c5457f74ff0d90f4537d0ad33
Author: Eduardo Lima Mitev <elima at igalia.com>
Date:   Sun Mar 5 20:28:43 2017 +0100

    glsl/linker: Check that re-declared, inter-shader built-in blocks match
    
    >From GLSL 4.5 spec, section "7.1 Built-In Language Variables", page 130 of
    the PDF states:
    
        "If multiple shaders using members of a built-in block belonging to
         the same interface are linked together in the same program, they must
         all redeclare the built-in block in the same way, as described in
         section 4.3.9 “Interface Blocks” for interface-block matching, or a
         link-time error will result."
    
    Fixes:
    * GL45-CTS.CommonBugs.CommonBug_PerVertexValidation
    
    v2 (Neil Roberts):
    Explicitly look for gl_PerVertex in the symbol tables instead of
    waiting to find a variable in the interface.
    
    Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102677
    Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
    Signed-off-by: Eduardo Lima Mitev <elima at igalia.com>
    Signed-off-by: Neil Roberts <nroberts at igalia.com>
    (cherry picked from commit f9de7f55969e981f6e98a41fce04bc3a2a8280eb)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=f34c7ba4e1666376ab99e62e436b95eeaf835b16
Author: Eduardo Lima Mitev <elima at igalia.com>
Date:   Sun Mar 5 20:28:42 2017 +0100

    glsl: Use the utility function to copy symbols between symbol tables
    
    This effectively factorizes a couple of similar routines.
    
    v2 (Neil Roberts): Non-trivial rebase on master
    
    Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
    Signed-off-by: Eduardo Lima Mitev <elima at igalia.com>
    Signed-off-by: Neil Roberts <nroberts at igalia.com>
    (cherry picked from commit f5fe99ac85e15b705612bd9e7599cc974c2a121b)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=ebb7ccb306e0aa8b44fa6ad047579db58e5e2cff
Author: Eduardo Lima Mitev <elima at igalia.com>
Date:   Sun Mar 5 20:28:41 2017 +0100

    glsl_parser_extra: Add utility to copy symbols between symbol tables
    
    Some symbols gathered in the symbols table during parsing are needed
    later for the compile and link stages, so they are moved along the
    process. Currently, only functions and non-temporary variables are
    copied between symbol tables. However, the built-in gl_PerVertex
    interface blocks are also needed during the linking stage (the last
    step), to match re-declared blocks of inter-stage shaders.
    
    This patch adds a new utility function that will factorize current code
    that copies functions and variables between two symbol tables, and in
    addition will copy explicitly declared gl_PerVertex blocks too.
    
    The function will be used in a subsequent patch.
    
    v2 (Neil Roberts):
    Allow the src symbol table to be NULL and explicitly copy the
    gl_PerVertex symbols in case they are not referenced in the exec_list.
    
    Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
    Signed-off-by: Eduardo Lima Mitev <elima at igalia.com>
    Signed-off-by: Neil Roberts <nroberts at igalia.com>
    (cherry picked from commit 4c62a270a99d443316e29020377465a90a6968c0)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=e4d964670a6d591352445e870d24454bf67d2970
Author: Matt Turner <mattst88 at gmail.com>
Date:   Thu Nov 23 10:41:34 2017 -0800

    util: Fix disk_cache index calculation on big endian
    
    The cache-test test program attempts to create a collision (using key_a
    and key_a_collide) by making the first two bytes identical. The idea is
    fine -- the shader cache wants to use the first four characters of a
    SHA1 hex digest as the index.
    
    The following program
    
            unsigned char array[4] = {1, 2, 3, 4};
            int *ptr = (int *)array;
    
            for (int i = 0; i < 4; i++) {
                printf("%02x", array[i]);
            }
            printf("\n");
    
            printf("%08x\n", *ptr);
    
    prints
    
       01020304
       04030201
    
    on little endian, and
    
       01020304
       01020304
    
    on big endian.
    
    On big endian platforms reading the character array back as an int (as
    is done in disk_cache.c) does not yield the same results as reading the
    byte array.
    
    To get the first four characters of the SHA1 hex digest when we mask
    with CACHE_INDEX_KEY_MASK, we need to byte swap the int on big endian
    platforms.
    
    Bugzilla: https://bugs.freedesktop.org/103668
    Bugzilla: https://bugs.gentoo.org/637060
    Bugzilla: https://bugs.gentoo.org/636326
    Fixes: 87ab26b2ab35 ("glsl: Add initial functions to implement an
                          on-disk cache")
    Reviewed-by: Emil Velikov <emil.velikov at collabora.com>
    (cherry picked from commit c690a7a8cdfb6425547bbb782020098405851194)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=bb8431aa3e9a53bc919f1b7f75dafa888a094f4b
Author: Matt Turner <mattst88 at gmail.com>
Date:   Wed Nov 22 22:39:51 2017 -0800

    util: Fix SHA1 implementation on big endian
    
    The code defines a macro blk0(i) based on the preprocessor condition
    BYTE_ORDER == LITTLE_ENDIAN. If true, blk0(i) is defined as a byte swap
    operation. Unfortunately, if the preprocessor macros used in the test
    are no defined, then the comparison becomes 0 == 0 and it evaluates as
    true.
    
    Fixes: d1efa09d342b ("util: import sha1 implementation from OpenBSD")
    Reviewed-by: Emil Velikov <emil.velikov at collabora.com>
    (cherry picked from commit 532674303a92c438cb1c48d224e9dee9dece91ec)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=a05879c982c322be93e3f8a3d407b5d001d16331
Author: Matt Turner <mattst88 at gmail.com>
Date:   Mon Nov 20 14:24:57 2017 -0800

    i965/fs: Handle negating immediates on MADs when propagating saturates
    
    MADs don't take immediate sources, but we allow them in the IR since it
    simplifies a lot of things. I neglected to consider that case.
    
    Fixes: 4009a9ead490 ("i965/fs: Allow saturate propagation to propagate
                          negations into MADs.")
    Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103616
    Reported-and-Tested-by: Ruslan Kabatsayev <b7.10110111 at gmail.com>
    Reviewed-by: Ian Romanick <ian.d.romanick at intel.com>
    (cherry picked from commit a05af1f7b8f82a38513bba31f9573cd62d82f18d)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=3e639156b84d8de36d8db4dfd90f28b7125c82bb
Author: Nicolai Hähnle <nicolai.haehnle at amd.com>
Date:   Fri Nov 10 13:11:53 2017 +0100

    ddebug: fix use-after-free of streamout targets
    
    Fixes: b47727a83ad6 ("ddebug: implement pipelined hang detection mode")
    Reviewed-by: Marek Olšák <marek.olsak at amd.com>
    (cherry picked from commit 16f8da299700e714fd5aff265b8f28fe2badfa95)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=e7904e1275e73ef71ece35c37c408817f40c57c6
Author: Nicolai Hähnle <nicolai.haehnle at amd.com>
Date:   Wed Nov 15 11:22:26 2017 +0100

    radeonsi/gfx9: fix VM fault with fetched instance divisors
    
    We need to account for SGPR locations in merged shaders.
    
    This case is exercised by KHR-GL45.enhanced_layouts.vertex_attrib_locations
    
    Fixes: 79c2e7388c7f ("radeonsi/gfx9: use SPI_SHADER_USER_DATA_COMMON")
    Reviewed-by: Marek Olšák <marek.olsak at amd.com>
    (cherry picked from commit df5ebe0c261e8d13683f2515be9ce263f5437bcd)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=210bbf948ecb101e1ecf0344680d89b34712286d
Author: George Barrett <bob at bob131.so>
Date:   Sun Nov 19 21:55:10 2017 +1100

    glsl: Catch subscripted calls to undeclared subroutines
    
    generate_array_index fails to check whether the target of a subroutine
    call exists in the AST, potentially passing around null ir_rvalue
    pointers eventuating in abort/segfault.
    
    Fixes: fd01840c0bd3 ("glsl: add AoA support to subroutines")
    Reviewed-by: Timothy Arceri <tarceri at itsqueeze.com>
    Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=100438
    (cherry picked from commit f09c2cefdd53cd61562a994294e9d0630868d2da)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=9ffe450dab68a601c4b9a9b290006b0de37f92ce
Author: Gert Wollny <gw.fossdev at gmail.com>
Date:   Fri Nov 17 12:13:40 2017 +0100

    r600: Emit EOP for more CF instruction types
    
    So far on pre-cayman chipsets the CF instructions CF_OP_LOOP_END,
    CF_OP_CALL_FS, CF_OP_POP, and CF_OP_GDS an extra CF_NOP instruction
    was added to add the EOP flag, even though this is not actually
    needed, because all these instrutions support the EOP flag.
    
    This patch removes the fixup code, adds setting the EOP flag for the
    according instructions as well as others like CF_OP_TEX and CF_OP_VTX,
    and adds writing out EOP for this type of instruction in the disassembler.
    
    This also fixes a bug where shaders were created that didn't actually have
    the EOP flag set in the last CF instruction, which might have resulted
    in GPU lockups.
    
    [airlied: cleaned up a little]
    Signed-off-by: Gert Wollny <gw.fossdev at gmail.com>
    Cc: <mesa-stable at lists.freedesktop.org>
    Signed-off-by: Dave Airlie <airlied at redhat.com>
    (cherry picked from commit 1d076aafbc05b0af299826ac0ee63b2fb28e944a)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=2859a8f29826cbc3d7a7b52405c3480d6ee3a307
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date:   Fri Nov 17 16:52:09 2017 -0800

    i965: Mark BOs as external when we export their handle
    
    Almost all of our BO export paths were already properly marked the BO as
    external and added it to the handle table.  Most export use-cases go
    through a prime fd or flink where we have a brw_bo export helper that
    does the right thing.  The one missing one happens when you call
    queryImage and ask for __DRI_IMAGE_ATTRIB_HANDLE.  We just grabbed the
    gem handle out of the BO (because it's really easy to do that) and
    handed it off to the client; what could go wrong?  As it turns out, this
    path is used by basically every compositor that wants to turn around and
    call drmModeAddFB2 on it so it can hand it off to display.  The result,
    as of 4b1e70cc57d7ff5f465544644b2180dee1490cee, is that we no longer set
    MOCS_PTE on those surfaces and the kernel's attempts to disable caching
    fail and we scanout gets corruption.
    
    Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103759
    Fixes: 4b1e70cc57d7ff5f465544644b2180dee1490cee
    Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
    Cc: mesa-stable at lists.freedesktop.org
    (cherry picked from commit 0a6a137eb27129e17298cfe9dd620205588ee4f6)

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=0904becf94c1758f8ddb76538c0136beac971546
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date:   Fri Nov 17 16:49:03 2017 -0800

    i965/bufmgr: Add a helper to mark a BO as external
    
    Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
    Cc: mesa-stable at lists.freedesktop.org
    (cherry picked from commit 344252a27f8d875572bbe65641a825af8e73845d)




More information about the mesa-commit mailing list