Mesa (master): iris: Mark constants dirty on transfer unmap even if no flushes occur

GitLab Mirror gitlab-mirror at kemper.freedesktop.org
Tue Apr 23 07:24:50 UTC 2019


Module: Mesa
Branch: master
Commit: 4d1223607278ca771bd9ba82ca52cd78893dc79d
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=4d1223607278ca771bd9ba82ca52cd78893dc79d

Author: Kenneth Graunke <kenneth at whitecape.org>
Date:   Mon Apr 22 19:11:44 2019 -0700

iris: Mark constants dirty on transfer unmap even if no flushes occur

I have various conditions in place to try and avoid unnecessary
PIPE_CONTROL flushes, especially to batches which may have never
used the buffer being mapped.  But if we do a CPU map to a bound
constant buffer, we still need to mark push constants dirty, even
if there's nothing happening in batches that would warrant a flush.

Fixes obvious misrendering in the "XCOM 2: War of the Chosen" menus
(lots of rainbow colored triangles).  Fixes lots of blinking elements
in "Shadow of Mordor".  Fixes missing crowd rendering in "DiRT Rally".

---

 src/gallium/drivers/iris/iris_resource.c | 10 ++++++++--
 1 file changed, 8 insertions(+), 2 deletions(-)

diff --git a/src/gallium/drivers/iris/iris_resource.c b/src/gallium/drivers/iris/iris_resource.c
index 5a12ee0ea35..0011439949e 100644
--- a/src/gallium/drivers/iris/iris_resource.c
+++ b/src/gallium/drivers/iris/iris_resource.c
@@ -1397,6 +1397,11 @@ iris_transfer_flush_region(struct pipe_context *ctx,
          iris_flush_and_dirty_for_history(ice, &ice->batches[i], res);
       }
    }
+
+   /* Make sure we flag constants dirty even if there's no need to emit
+    * any PIPE_CONTROLs to a batch.
+    */
+   iris_flush_and_dirty_for_history(ice, NULL, res);
 }
 
 static void
@@ -1435,7 +1440,7 @@ iris_flush_and_dirty_for_history(struct iris_context *ice,
    /* We've likely used the rendering engine (i.e. BLORP) to write to this
     * surface.  Flush the render cache so the data actually lands.
     */
-   if (batch->name != IRIS_BATCH_COMPUTE)
+   if (batch && batch->name != IRIS_BATCH_COMPUTE)
       flush |= PIPE_CONTROL_RENDER_TARGET_FLUSH;
 
    uint64_t dirty = 0ull;
@@ -1461,7 +1466,8 @@ iris_flush_and_dirty_for_history(struct iris_context *ice,
    if (res->bind_history & (PIPE_BIND_SHADER_BUFFER | PIPE_BIND_SHADER_IMAGE))
       flush |= PIPE_CONTROL_DATA_CACHE_FLUSH;
 
-   iris_emit_pipe_control_flush(batch, flush);
+   if (batch)
+      iris_emit_pipe_control_flush(batch, flush);
 
    ice->state.dirty |= dirty;
 }




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