Mesa (master): freedreno/a6xx: WFI before RB_CCU_CNTL writes

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Module: Mesa
Branch: master
Commit: 1d002cfade6d5fa912bb7bfd98291bf39b3346a9
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=1d002cfade6d5fa912bb7bfd98291bf39b3346a9

Author: Rob Clark <robdclark at chromium.org>
Date:   Thu Jun  6 10:19:07 2019 -0700

freedreno/a6xx: WFI before RB_CCU_CNTL writes

This seems to be in a block of non buffered/context regs.  Blob always
WFIs before write, so probably a good idea.

Annoyingly, compared to ealier gens, it is a bit harder to tell from the
register offset whether it is a buffered reg, it isn't as simple as
everything below 0x2000, it seems.

Signed-off-by: Rob Clark <robdclark at chromium.org>
Reviewed-by: Kristian H. Kristensen <hoegsberg at google.com>

---

 src/gallium/drivers/freedreno/a6xx/fd6_draw.c | 2 ++
 src/gallium/drivers/freedreno/a6xx/fd6_emit.c | 2 ++
 2 files changed, 4 insertions(+)

diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_draw.c b/src/gallium/drivers/freedreno/a6xx/fd6_draw.c
index 7933d3bc2b5..edf4925a339 100644
--- a/src/gallium/drivers/freedreno/a6xx/fd6_draw.c
+++ b/src/gallium/drivers/freedreno/a6xx/fd6_draw.c
@@ -266,6 +266,8 @@ fd6_clear_lrz(struct fd_batch *batch, struct fd_resource *zsbuf, double depth)
 	OUT_RING(ring, A2XX_CP_SET_MARKER_0_MODE(RM6_BYPASS));
 	emit_marker6(ring, 7);
 
+	OUT_WFI5(ring);
+
 	OUT_PKT4(ring, REG_A6XX_RB_CCU_CNTL, 1);
 	OUT_RING(ring, 0x10000000);
 
diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_emit.c b/src/gallium/drivers/freedreno/a6xx/fd6_emit.c
index a48fc11721f..c9766fd382d 100644
--- a/src/gallium/drivers/freedreno/a6xx/fd6_emit.c
+++ b/src/gallium/drivers/freedreno/a6xx/fd6_emit.c
@@ -1143,6 +1143,8 @@ t7              opcode: CP_WAIT_FOR_IDLE (26) (1 dwords)
 0000000500024068:               70268000
 */
 
+	OUT_WFI5(ring);
+
 	WRITE(REG_A6XX_RB_CCU_CNTL, 0x7c400004);
 	WRITE(REG_A6XX_RB_UNKNOWN_8E04, 0x00100000);
 	WRITE(REG_A6XX_SP_UNKNOWN_AE04, 0x8);