Mesa (master): virgl: add shader images to virgl_shader_binding_state

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Module: Mesa
Branch: master
Commit: 98fd742d7ecff7532ee13a17a1848764bd8de770
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=98fd742d7ecff7532ee13a17a1848764bd8de770

Author: Chia-I Wu <olvaffe at gmail.com>
Date:   Thu May 16 14:33:15 2019 -0700

virgl: add shader images to virgl_shader_binding_state

It replaces virgl_context::images.

Signed-off-by: Chia-I Wu <olvaffe at gmail.com>
Reviewed-by: Alexandros Frantzis <alexandros.frantzis at collabora.com>

---

 src/gallium/drivers/virgl/virgl_context.c | 37 ++++++++++++++++++++-----------
 src/gallium/drivers/virgl/virgl_context.h |  4 +++-
 2 files changed, 27 insertions(+), 14 deletions(-)

diff --git a/src/gallium/drivers/virgl/virgl_context.c b/src/gallium/drivers/virgl/virgl_context.c
index 3630a17b182..0d4a8861a89 100644
--- a/src/gallium/drivers/virgl/virgl_context.c
+++ b/src/gallium/drivers/virgl/virgl_context.c
@@ -179,13 +179,16 @@ static void virgl_attach_res_shader_images(struct virgl_context *vctx,
                                            enum pipe_shader_type shader_type)
 {
    struct virgl_winsys *vws = virgl_screen(vctx->base.screen)->vws;
+   const struct virgl_shader_binding_state *binding =
+      &vctx->shader_bindings[shader_type];
+   uint32_t remaining_mask = binding->image_enabled_mask;
    struct virgl_resource *res;
-   unsigned i;
-   for (i = 0; i < PIPE_MAX_SHADER_IMAGES; i++) {
-      res = virgl_resource(vctx->images[shader_type][i]);
-      if (res) {
-         vws->emit_res(vws, vctx->cbuf, res->hw_res, FALSE);
-      }
+
+   while (remaining_mask) {
+      int i = u_bit_scan(&remaining_mask);
+      res = virgl_resource(binding->images[i].resource);
+      assert(res);
+      vws->emit_res(vws, vctx->cbuf, res->hw_res, FALSE);
    }
 }
 
@@ -1079,17 +1082,20 @@ static void virgl_set_shader_images(struct pipe_context *ctx,
 {
    struct virgl_context *vctx = virgl_context(ctx);
    struct virgl_screen *rs = virgl_screen(ctx->screen);
+   struct virgl_shader_binding_state *binding =
+      &vctx->shader_bindings[shader];
 
+   binding->image_enabled_mask &= ~u_bit_consecutive(start_slot, count);
    for (unsigned i = 0; i < count; i++) {
       unsigned idx = start_slot + i;
-
-      if (images) {
-         if (images[i].resource) {
-            pipe_resource_reference(&vctx->images[shader][idx], images[i].resource);
-            continue;
-         }
+      if (images && images[i].resource) {
+         pipe_resource_reference(&binding->images[idx].resource,
+                                 images[i].resource);
+         binding->images[idx] = images[i];
+         binding->image_enabled_mask |= 1 << idx;
+      } else {
+         pipe_resource_reference(&binding->images[idx].resource, NULL);
       }
-      pipe_resource_reference(&vctx->images[shader][idx], NULL);
    }
 
    uint32_t max_shader_images = (shader == PIPE_SHADER_FRAGMENT || shader == PIPE_SHADER_COMPUTE) ?
@@ -1182,6 +1188,11 @@ virgl_release_shader_binding(struct virgl_context *vctx,
       int i = u_bit_scan(&binding->ssbo_enabled_mask);
       pipe_resource_reference(&binding->ssbos[i].buffer, NULL);
    }
+
+   while (binding->image_enabled_mask) {
+      int i = u_bit_scan(&binding->image_enabled_mask);
+      pipe_resource_reference(&binding->images[i].resource, NULL);
+   }
 }
 
 static void
diff --git a/src/gallium/drivers/virgl/virgl_context.h b/src/gallium/drivers/virgl/virgl_context.h
index d13f9e8a521..663a3ca9514 100644
--- a/src/gallium/drivers/virgl/virgl_context.h
+++ b/src/gallium/drivers/virgl/virgl_context.h
@@ -60,6 +60,9 @@ struct virgl_shader_binding_state {
 
    struct pipe_shader_buffer ssbos[PIPE_MAX_SHADER_BUFFERS];
    uint32_t ssbo_enabled_mask;
+
+   struct pipe_image_view images[PIPE_MAX_SHADER_IMAGES];
+   uint32_t image_enabled_mask;
 };
 
 struct virgl_context {
@@ -86,7 +89,6 @@ struct virgl_context {
    struct virgl_so_target so_targets[PIPE_MAX_SO_BUFFERS];
    unsigned num_so_targets;
 
-   struct pipe_resource *images[PIPE_SHADER_TYPES][PIPE_MAX_SHADER_BUFFERS];
    uint32_t num_draws, num_compute;
 
    struct pipe_resource *atomic_buffers[PIPE_MAX_HW_ATOMIC_BUFFERS];