Mesa (master): intel/fs: Re-order logical surface arguments
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Fri Mar 1 01:57:38 UTC 2019
Module: Mesa
Branch: master
Commit: 494a0543e62be59be3a56ca21990eb9eff5ac668
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=494a0543e62be59be3a56ca21990eb9eff5ac668
Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date: Mon Feb 11 16:15:50 2019 -0600
intel/fs: Re-order logical surface arguments
It makes more sense to start at the surface then move on to the address
and then the data. Also, this is a really good test of whether or not
we got all the places that use the sources by explicit integer number.
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira at intel.com>
---
src/intel/compiler/brw_eu_defines.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/intel/compiler/brw_eu_defines.h b/src/intel/compiler/brw_eu_defines.h
index 37b85636c08..aefc43bc7d6 100644
--- a/src/intel/compiler/brw_eu_defines.h
+++ b/src/intel/compiler/brw_eu_defines.h
@@ -852,12 +852,12 @@ enum tex_logical_srcs {
};
enum surface_logical_srcs {
+ /** Surface binding table index */
+ SURFACE_LOGICAL_SRC_SURFACE,
/** Surface address; could be multi-dimensional for typed opcodes */
SURFACE_LOGICAL_SRC_ADDRESS,
/** Data to be written or used in an atomic op */
SURFACE_LOGICAL_SRC_DATA,
- /** Surface binding table index */
- SURFACE_LOGICAL_SRC_SURFACE,
/** Surface number of dimensions. Affects the size of ADDRESS */
SURFACE_LOGICAL_SRC_IMM_DIMS,
/** Per-opcode immediate argument. For atomics, this is the atomic opcode */
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