Mesa (master): nir: Rename nir_address_format_vk_index_offset to not be vk

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Module: Mesa
Branch: master
Commit: c8d42c8cf689fcaac1e0fd8477a8ddf269c4fe4d
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=c8d42c8cf689fcaac1e0fd8477a8ddf269c4fe4d

Author: Jason Ekstrand <jason.ekstrand at intel.com>
Date:   Sat Mar  9 10:10:37 2019 -0600

nir: Rename nir_address_format_vk_index_offset to not be vk

It's just a 32-bit index and offset.  We're going to want to use it in
GL as well so stop talking about Vulkan.

Reviewed-by: Kristian H. Kristensen <hoegsberg at chromium.org>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira at intel.com>

---

 src/compiler/nir/nir.h                           | 4 ++--
 src/compiler/nir/nir_lower_io.c                  | 8 ++++----
 src/intel/vulkan/anv_nir_apply_pipeline_layout.c | 6 +++---
 src/intel/vulkan/anv_pipeline.c                  | 2 +-
 4 files changed, 10 insertions(+), 10 deletions(-)

diff --git a/src/compiler/nir/nir.h b/src/compiler/nir/nir.h
index 98adf1b5331..b25842834ae 100644
--- a/src/compiler/nir/nir.h
+++ b/src/compiler/nir/nir.h
@@ -3021,9 +3021,9 @@ typedef enum {
 
    /**
     * An address format which is comprised of a vec2 where the first
-    * component is a vulkan descriptor index and the second is an offset.
+    * component is a buffer index and the second is an offset.
     */
-   nir_address_format_vk_index_offset,
+   nir_address_format_32bit_index_offset,
 } nir_address_format;
 bool nir_lower_explicit_io(nir_shader *shader,
                            nir_variable_mode modes,
diff --git a/src/compiler/nir/nir_lower_io.c b/src/compiler/nir/nir_lower_io.c
index d1f95cfe6ac..c9db2de0ba0 100644
--- a/src/compiler/nir/nir_lower_io.c
+++ b/src/compiler/nir/nir_lower_io.c
@@ -599,7 +599,7 @@ build_addr_iadd(nir_builder *b, nir_ssa_def *addr,
       assert(addr->num_components == 1);
       return nir_iadd(b, addr, offset);
 
-   case nir_address_format_vk_index_offset:
+   case nir_address_format_32bit_index_offset:
       assert(addr->num_components == 2);
       return nir_vec2(b, nir_channel(b, addr, 0),
                          nir_iadd(b, nir_channel(b, addr, 1), offset));
@@ -619,7 +619,7 @@ static nir_ssa_def *
 addr_to_index(nir_builder *b, nir_ssa_def *addr,
               nir_address_format addr_format)
 {
-   assert(addr_format == nir_address_format_vk_index_offset);
+   assert(addr_format == nir_address_format_32bit_index_offset);
    assert(addr->num_components == 2);
    return nir_channel(b, addr, 0);
 }
@@ -628,7 +628,7 @@ static nir_ssa_def *
 addr_to_offset(nir_builder *b, nir_ssa_def *addr,
                nir_address_format addr_format)
 {
-   assert(addr_format == nir_address_format_vk_index_offset);
+   assert(addr_format == nir_address_format_32bit_index_offset);
    assert(addr->num_components == 2);
    return nir_channel(b, addr, 1);
 }
@@ -651,7 +651,7 @@ addr_to_global(nir_builder *b, nir_ssa_def *addr,
       assert(addr->num_components == 1);
       return addr;
 
-   case nir_address_format_vk_index_offset:
+   case nir_address_format_32bit_index_offset:
       unreachable("Cannot get a 64-bit address with this address format");
    }
 
diff --git a/src/intel/vulkan/anv_nir_apply_pipeline_layout.c b/src/intel/vulkan/anv_nir_apply_pipeline_layout.c
index d8369c8e18b..96e2e617d7d 100644
--- a/src/intel/vulkan/anv_nir_apply_pipeline_layout.c
+++ b/src/intel/vulkan/anv_nir_apply_pipeline_layout.c
@@ -168,7 +168,7 @@ lower_res_index_intrinsic(nir_intrinsic_instr *intrin,
       index = nir_imm_ivec2(b, state->set[set].desc_offset,
                                bind_layout->descriptor_offset);
    } else {
-      /* We're using nir_address_format_vk_index_offset */
+      /* We're using nir_address_format_32bit_index_offset */
       index = nir_vec2(b, nir_iadd_imm(b, array_index, surface_index),
                           nir_imm_int(b, 0));
    }
@@ -211,7 +211,7 @@ lower_load_vulkan_descriptor(nir_intrinsic_instr *intrin,
 
    b->cursor = nir_before_instr(&intrin->instr);
 
-   /* We follow the nir_address_format_vk_index_offset model */
+   /* We follow the nir_address_format_32bit_index_offset model */
    assert(intrin->src[0].is_ssa);
    nir_ssa_def *index = intrin->src[0].ssa;
 
@@ -231,7 +231,7 @@ lower_get_buffer_size(nir_intrinsic_instr *intrin,
    assert(intrin->src[0].is_ssa);
    nir_ssa_def *index = intrin->src[0].ssa;
 
-   /* We're following the nir_address_format_vk_index_offset model so the
+   /* We're following the nir_address_format_32bit_index_offset model so the
     * binding table index is the first component of the address.  The
     * back-end wants a scalar binding table index source.
     */
diff --git a/src/intel/vulkan/anv_pipeline.c b/src/intel/vulkan/anv_pipeline.c
index bb9c70a0718..53500fd65d8 100644
--- a/src/intel/vulkan/anv_pipeline.c
+++ b/src/intel/vulkan/anv_pipeline.c
@@ -600,7 +600,7 @@ anv_pipeline_lower_nir(struct anv_pipeline *pipeline,
 
       NIR_PASS_V(nir, nir_lower_explicit_io,
                  nir_var_mem_ubo | nir_var_mem_ssbo,
-                 nir_address_format_vk_index_offset);
+                 nir_address_format_32bit_index_offset);
 
       NIR_PASS_V(nir, nir_opt_constant_folding);
    }