Mesa (staging/19.2): radeonsi/gfx10: fix corruption for chips with harvested TCCs
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Tue Oct 1 22:31:05 UTC 2019
Module: Mesa
Branch: staging/19.2
Commit: 0b97377f5840728daba339b21abf0ca0bb00eb3a
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=0b97377f5840728daba339b21abf0ca0bb00eb3a
Author: Marek Olšák <marek.olsak at amd.com>
Date: Tue Sep 24 16:56:57 2019 -0400
radeonsi/gfx10: fix corruption for chips with harvested TCCs
Cc: 19.2 <mesa-stable at lists.freedesktop.org>
Reviewed-by: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
(cherry picked from commit 235ebe91633e7f47518118983e0e6f5c632b25a4)
---
src/gallium/drivers/radeonsi/si_pipe.h | 8 ++++++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/src/gallium/drivers/radeonsi/si_pipe.h b/src/gallium/drivers/radeonsi/si_pipe.h
index 41a6f5cebae..734763b9d07 100644
--- a/src/gallium/drivers/radeonsi/si_pipe.h
+++ b/src/gallium/drivers/radeonsi/si_pipe.h
@@ -1700,7 +1700,9 @@ si_make_CB_shader_coherent(struct si_context *sctx, unsigned num_samples,
SI_CONTEXT_INV_VCACHE;
if (sctx->chip_class >= GFX10) {
- if (shaders_read_metadata)
+ if (sctx->screen->info.tcc_harvested)
+ sctx->flags |= SI_CONTEXT_INV_L2;
+ else if (shaders_read_metadata)
sctx->flags |= SI_CONTEXT_INV_L2_METADATA;
} else if (sctx->chip_class == GFX9) {
/* Single-sample color is coherent with shaders on GFX9, but
@@ -1726,7 +1728,9 @@ si_make_DB_shader_coherent(struct si_context *sctx, unsigned num_samples,
SI_CONTEXT_INV_VCACHE;
if (sctx->chip_class >= GFX10) {
- if (shaders_read_metadata)
+ if (sctx->screen->info.tcc_harvested)
+ sctx->flags |= SI_CONTEXT_INV_L2;
+ else if (shaders_read_metadata)
sctx->flags |= SI_CONTEXT_INV_L2_METADATA;
} else if (sctx->chip_class == GFX9) {
/* Single-sample depth (not stencil) is coherent with shaders
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