Mesa (master): freedreno/ir3/cf: skip array load/store

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Module: Mesa
Branch: master
Commit: 67dbe8088fd97e944ea9adbf7080d63f8343f475
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=67dbe8088fd97e944ea9adbf7080d63f8343f475

Author: Rob Clark <robdclark at chromium.org>
Date:   Mon Mar 16 14:50:32 2020 -0700

freedreno/ir3/cf: skip array load/store

Don't fold conversions into array (incl phi lowered to regs/array).
These aren't SSA.  Avoids crashes in particular in frag shaders with
flow control, which would leave a dangling array write disconnect from
the original cov src.

Possibly this could be slightly relaxed, if there is no other consumer
of the src, and it were in the same block.  But it would require
updating block->keeps, and taking care of barrier state.  Which isn't a
thing the cf pass does currently.

Signed-off-by: Rob Clark <robdclark at chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4423>

---

 src/freedreno/ir3/ir3_cf.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/src/freedreno/ir3/ir3_cf.c b/src/freedreno/ir3/ir3_cf.c
index 636ed384d79..b9035706131 100644
--- a/src/freedreno/ir3/ir3_cf.c
+++ b/src/freedreno/ir3/ir3_cf.c
@@ -38,6 +38,11 @@ is_fp16_conv(struct ir3_instruction *instr)
 	if (dst->flags & (IR3_REG_EVEN | IR3_REG_POS_INF))
 		return false;
 
+	if (dst->flags & (IR3_REG_RELATIV | IR3_REG_ARRAY))
+		return false;
+	if (src->flags & (IR3_REG_RELATIV | IR3_REG_ARRAY))
+		return false;
+
 	if (instr->cat1.src_type == TYPE_F32 &&
 			instr->cat1.dst_type == TYPE_F16)
 		return true;