Mesa (master): nir: fix definition of imadsh_mix16 for vectors

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Module: Mesa
Branch: master
Commit: bf64648864224abe28d883f0c878214530ccf08c
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=bf64648864224abe28d883f0c878214530ccf08c

Author: Rob Clark <robdclark at chromium.org>
Date:   Wed Mar 11 13:55:17 2020 -0700

nir: fix definition of imadsh_mix16 for vectors

Fixes: c27b3758fa0 ("nir/opcodes: Add new 'umul_low' and 'imadsh_mix16' opcodes")
Signed-off-by: Rob Clark <robdclark at chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4423>

---

 src/compiler/nir/nir_opcodes.py | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/src/compiler/nir/nir_opcodes.py b/src/compiler/nir/nir_opcodes.py
index f34c1ff20f1..57be67320c5 100644
--- a/src/compiler/nir/nir_opcodes.py
+++ b/src/compiler/nir/nir_opcodes.py
@@ -1129,9 +1129,9 @@ binop("amul", tint, _2src_commutative + associative, "src0 * src1")
 # ir3-specific instruction that maps directly to mul-add shift high mix,
 # (IMADSH_MIX16 i.e. ah * bl << 16 + c). It is used for lowering integer
 # multiplication (imul) on Freedreno backend..
-opcode("imadsh_mix16", 1, tint32,
-       [1, 1, 1], [tint32, tint32, tint32], False, "", """
-dst.x = ((((src0.x & 0xffff0000) >> 16) * (src1.x & 0x0000ffff)) << 16) + src2.x;
+opcode("imadsh_mix16", 0, tint32,
+       [0, 0, 0], [tint32, tint32, tint32], False, "", """
+dst = ((((src0 & 0xffff0000) >> 16) * (src1 & 0x0000ffff)) << 16) + src2;
 """)
 
 # ir3-specific instruction that maps directly to ir3 mad.s24.