Mesa (master): freedreno/a6xx: move const state to single stateobj
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Thu Apr 30 20:21:11 UTC 2020
Module: Mesa
Branch: master
Commit: 8cfa765049d571a95b14ea006f900de8a7bf5cae
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=8cfa765049d571a95b14ea006f900de8a7bf5cae
Author: Rob Clark <robdclark at chromium.org>
Date: Thu Apr 16 12:55:35 2020 -0700
freedreno/a6xx: move const state to single stateobj
In practice, we end up updating all the shader stages at the same time.
So collapse this into a single group.
Reduces CP overhead.
Signed-off-by: Rob Clark <robdclark at chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4813>
---
src/gallium/drivers/freedreno/a6xx/fd6_emit.c | 41 ++++++++++++++++++---------
src/gallium/drivers/freedreno/a6xx/fd6_emit.h | 6 +---
2 files changed, 28 insertions(+), 19 deletions(-)
diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_emit.c b/src/gallium/drivers/freedreno/a6xx/fd6_emit.c
index 32ac478dfda..c7be485a8f2 100644
--- a/src/gallium/drivers/freedreno/a6xx/fd6_emit.c
+++ b/src/gallium/drivers/freedreno/a6xx/fd6_emit.c
@@ -895,20 +895,35 @@ fd6_emit_tess_const(struct fd6_emit *emit)
}
static void
-fd6_emit_consts(struct fd6_emit *emit, const struct ir3_shader_variant *v,
- enum pipe_shader_type type, enum fd6_state_id id, unsigned enable_mask)
+fd6_emit_consts(struct fd6_emit *emit)
{
+ static const enum pipe_shader_type types[] = {
+ PIPE_SHADER_VERTEX, PIPE_SHADER_TESS_CTRL, PIPE_SHADER_TESS_EVAL,
+ PIPE_SHADER_GEOMETRY, PIPE_SHADER_FRAGMENT,
+ };
+ const struct ir3_shader_variant *variants[] = {
+ emit->vs, emit->hs, emit->ds, emit->gs, emit->fs,
+ };
struct fd_context *ctx = emit->ctx;
+ unsigned sz = 0;
- if (v && ctx->dirty_shader[type] & (FD_DIRTY_SHADER_PROG | FD_DIRTY_SHADER_CONST)) {
- struct fd_ringbuffer *constobj = fd_submit_new_ringbuffer(
- ctx->batch->submit, v->shader->ubo_state.cmdstream_size,
- FD_RINGBUFFER_STREAMING);
+ for (unsigned i = 0; i < ARRAY_SIZE(types); i++) {
+ if (!variants[i])
+ continue;
+ sz += variants[i]->shader->ubo_state.cmdstream_size;
+ }
- ir3_emit_user_consts(ctx->screen, v, constobj, &ctx->constbuf[type]);
- ir3_emit_ubos(ctx->screen, v, constobj, &ctx->constbuf[type]);
- fd6_emit_take_group(emit, constobj, id, enable_mask);
+ struct fd_ringbuffer *constobj = fd_submit_new_ringbuffer(
+ ctx->batch->submit, sz, FD_RINGBUFFER_STREAMING);
+
+ for (unsigned i = 0; i < ARRAY_SIZE(types); i++) {
+ if (!variants[i])
+ continue;
+ ir3_emit_user_consts(ctx->screen, variants[i], constobj, &ctx->constbuf[types[i]]);
+ ir3_emit_ubos(ctx->screen, variants[i], constobj, &ctx->constbuf[types[i]]);
}
+
+ fd6_emit_take_group(emit, constobj, FD6_GROUP_CONST, ENABLE_ALL);
}
void
@@ -1053,11 +1068,9 @@ fd6_emit_state(struct fd_ringbuffer *ring, struct fd6_emit *emit)
fd6_emit_take_group(emit, ring, FD6_GROUP_PROG_FB_RAST, ENABLE_DRAW);
}
- fd6_emit_consts(emit, vs, PIPE_SHADER_VERTEX, FD6_GROUP_VS_CONST, ENABLE_ALL);
- fd6_emit_consts(emit, hs, PIPE_SHADER_TESS_CTRL, FD6_GROUP_HS_CONST, ENABLE_ALL);
- fd6_emit_consts(emit, ds, PIPE_SHADER_TESS_EVAL, FD6_GROUP_DS_CONST, ENABLE_ALL);
- fd6_emit_consts(emit, gs, PIPE_SHADER_GEOMETRY, FD6_GROUP_GS_CONST, ENABLE_ALL);
- fd6_emit_consts(emit, fs, PIPE_SHADER_FRAGMENT, FD6_GROUP_FS_CONST, ENABLE_DRAW);
+ if (dirty & (FD_DIRTY_CONST | FD_DIRTY_PROG)) {
+ fd6_emit_consts(emit);
+ }
if (emit->key.key.has_gs || emit->key.key.tessellation)
fd6_emit_tess_const(emit);
diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_emit.h b/src/gallium/drivers/freedreno/a6xx/fd6_emit.h
index 16bb866cdd7..c5e8882f6a9 100644
--- a/src/gallium/drivers/freedreno/a6xx/fd6_emit.h
+++ b/src/gallium/drivers/freedreno/a6xx/fd6_emit.h
@@ -51,11 +51,7 @@ enum fd6_state_id {
FD6_GROUP_LRZ,
FD6_GROUP_LRZ_BINNING,
FD6_GROUP_VBO,
- FD6_GROUP_VS_CONST,
- FD6_GROUP_HS_CONST,
- FD6_GROUP_DS_CONST,
- FD6_GROUP_GS_CONST,
- FD6_GROUP_FS_CONST,
+ FD6_GROUP_CONST,
FD6_GROUP_VS_DRIVER_PARAMS,
FD6_GROUP_PRIMITIVE_PARAMS,
FD6_GROUP_VS_TEX,
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