Mesa (master): 21 new commits

Sat Feb 1 02:57:15 UTC 2020

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=982d61e2cdd5a5e3f82444787634fa45ba2fd44f
Author: Rob Clark <robdclark at chromium.org>
Date:   Mon Jan 27 08:35:20 2020 -0800

    freedreno/ir3: fix a dirty lie
    
    Lies, damn lies, and leftover hacks!
    
    We no longer hard-code these two, so fix the disasm to print the correct
    values.
    
    Signed-off-by: Rob Clark <robdclark at chromium.org>
    Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3569>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3569>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=752aeb7b3fe75b3c6ce8d9dadaba9c4111fa7254
Author: Rob Clark <robdclark at chromium.org>
Date:   Mon Jan 27 08:29:35 2020 -0800

    freedreno/ir3: simplify split from collect
    
    In some cases we need to split components out from what was already a
    collect.  That was making it hard to DCE unused components of the
    collect.  (Ie. unused components of fragcoord, etc)
    
    So just detect this case and skip the chained collect+split.
    
    Signed-off-by: Rob Clark <robdclark at chromium.org>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3569>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=8d0e7d9a4c1cfe28b3cd2356e94e287e82821e1a
Author: Rob Clark <robdclark at chromium.org>
Date:   Mon Jan 27 08:26:04 2020 -0800

    freedreno/ir3: create fragcoord instructions in input block
    
    This was somehow working to create the instructions in a random block,
    and use the value in other blocks, by dumb luck.  But two-pass-RA's
    better choice of register assignment causes a couple dEQPs to start
    failing without this fix:
    
    dEQP-GLES3.functional.shaders.metamorphic.bubblesort_flag.variant_1
    dEQP-GLES3.functional.shaders.metamorphic.bubblesort_flag.variant_2
    
    Signed-off-by: Rob Clark <robdclark at chromium.org>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3569>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=fb09020ef23cc87c1c3024add572cf0a571e8ddc
Author: Rob Clark <robdclark at chromium.org>
Date:   Thu Jan 23 16:45:29 2020 -0800

    freedreno/ir3: remove unused tex arg harder
    
    Just killing the SSA link isn't enough.  It confuses RA, legalize,
    and postsched to see a bogus unused reg.
    
    Signed-off-by: Rob Clark <robdclark at chromium.org>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3569>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=2ffe44ec0a5dba18e4a88ca7dd1042e823f9685e
Author: Rob Clark <robdclark at chromium.org>
Date:   Wed Jan 15 14:52:43 2020 -0800

    freedreno/ir3: add RA sanity check
    
    Signed-off-by: Rob Clark <robdclark at chromium.org>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3569>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=2f4f46b7080a1087420939b2f4bf0bea414cd3ce
Author: Rob Clark <robdclark at chromium.org>
Date:   Sat Jan 11 17:30:24 2020 -0800

    freedreno/a6xx: fix lrz overflow
    
    Running the complete deqp_gles2 seems to trigger an overflow in lrz
    cmdstream.  We skip the blit clear fast-path if there have been any
    draws (so mid-batch clears of any attached buffer hit the 3d pipe).
    Which means it is safe to simply discard any lrz clear rendering.
    
    Signed-off-by: Rob Clark <robdclark at chromium.org>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3569>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=3e79c4f0edc4a263c29f8df6169d0ad74aee7c69
Author: Rob Clark <robdclark at chromium.org>
Date:   Tue Oct 22 14:00:09 2019 -0700

    freedreno/ir3: two pass register allocation
    
    Signed-off-by: Rob Clark <robdclark at chromium.org>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3569>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=b0293af7a5d821776e7e90e3892015581c497810
Author: Rob Clark <robdclark at chromium.org>
Date:   Sat Jan 18 13:44:26 2020 -0800

    freedreno/ir3: don't precolor unused inputs
    
    This apparently can happen with gs/tess.  And will cause problems with
    two-pass-ra, so lets just skip them.
    
    Signed-off-by: Rob Clark <robdclark at chromium.org>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3569>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=ad2587d3c8885ce4aa0403269268a1c0ab8c2cac
Author: Rob Clark <robdclark at chromium.org>
Date:   Sat Jan 18 11:03:38 2020 -0800

    freedreno/ir3: add is_tex_or_prefetch()
    
    Some of the aspects of tex prefetch are in common with normal tex
    instructions, such as having a wrmask to control which components
    are written.  Add a helper for this.
    
    This should result in actually using the prefetch wrmask to avoid
    fetching unneeded components.
    
    Signed-off-by: Rob Clark <robdclark at chromium.org>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3569>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=4a7a6c9ef0eb6b26d8410591353142207689d085
Author: Rob Clark <robdclark at chromium.org>
Date:   Wed Jan 15 14:23:23 2020 -0800

    freedreno/ir3: number instructions from one
    
    ra_block_compute_live_ranges() treats zero as "not yet defined", so
    probably best to not let this be a valid instruction #
    
    Signed-off-by: Rob Clark <robdclark at chromium.org>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3569>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=0f78c32492ed096649b015a4967d6d56c18dd14a
Author: Rob Clark <robdclark at chromium.org>
Date:   Fri Dec 13 14:09:39 2019 -0800

    freedreno/ir3: post-RA sched pass
    
    After RA, we can schedule to increase parallelism (reduce nop's) without
    worrying about increasing register pressure.  This pass lets us cut down
    the instruction count ~10%, and prioritize bary.f, kill, etc, which
    would tend to increase register pressure if we tried to do that before
    RA.
    
    It should be more useful if RA round-robin'd register choices.
    
    Signed-off-by: Rob Clark <robdclark at chromium.org>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3569>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=3369406e44b0226295e7475e189da2e42efd7f22
Author: Rob Clark <robdclark at chromium.org>
Date:   Thu Jan 23 10:26:27 2020 -0800

    freedreno/ir3: fix kill scheduling
    
    kill (and other cat0/flow instructions) do not have a dst register.
    Which was mostly harmless before, other than RA thinking it would need
    a free register to write.  (But nothing consumed it, so the value would
    be immediately dead.)  But this would cause more problems with postsched
    which would see a bogus dependency.
    
    Also, post-RA sched *does* need to see the dependency on the predicate
    register.
    
    Signed-off-by: Rob Clark <robdclark at chromium.org>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3569>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=9a9f78f1f9f0019687eb374aae5abcd3b0617cf4
Author: Rob Clark <robdclark at chromium.org>
Date:   Tue Oct 22 16:05:41 2019 -0700

    freedreno/ir3/ra: make use()/def() functions instead of macros
    
    Originally these were nested functions, which worked nicely, giving us
    the function of a local macro that was actual 'c' syntax (ie. not token
    pasted macro).  But these were converted to macros because clang doesn't
    let us have nice gcc extensions.
    
    Extract these back out into functions, before adding more things and
    making the macros even more cumbersome.
    
    Signed-off-by: Rob Clark <robdclark at chromium.org>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3569>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=a5f24f966ae217981cd39e867a0de1fee029e740
Author: Rob Clark <robdclark at chromium.org>
Date:   Thu Dec 19 13:58:32 2019 -0800

    freedreno/ir3: a bit more optmsgs debug
    
    Also dump where arrays are allocated.  This was useful for debugging.
    
    Signed-off-by: Rob Clark <robdclark at chromium.org>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3569>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=300d1181c72043afe045a155079fc152fcd1283e
Author: Rob Clark <robdclark at chromium.org>
Date:   Fri Jan 10 14:07:03 2020 -0800

    freedreno/ir3: move atomic fixup after RA
    
    A post-RA sched pass will move the extra mov's to the wrong place, so
    rework the fixup so it can run after RA (and therefore after postsched)
    
    Signed-off-by: Rob Clark <robdclark at chromium.org>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3569>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=304b50c9f8f57a115ac251f022093c8adfb0823d
Author: Rob Clark <robdclark at chromium.org>
Date:   Wed Dec 18 14:04:36 2019 -0800

    freedreno/ir3: move block-scheduling into legalize
    
    We want to do this only once.  If we have post-RA sched pass, then we
    don't want to do it pre-RA.  Since legalize is where we resolve the
    branch/jumps, we might as well move this into legalize.
    
    Signed-off-by: Rob Clark <robdclark at chromium.org>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3569>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=093c94456bc99308bd80bcc952d1f77ea71a831c
Author: Rob Clark <robdclark at chromium.org>
Date:   Wed Dec 18 11:57:41 2019 -0800

    freedreno/ir3: move nop padding to legalize
    
    This way we can deal with it in one place, *after* all the blocks have
    been scheduled.  Which will simplify life for a post-RA sched pass.
    
    This has the benefit of already taking into account nop's that legalize
    has to insert for non-delay related reasons.
    
    Signed-off-by: Rob Clark <robdclark at chromium.org>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3569>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=c803c662f990621acefd2f002d9df0d42ad8a3a0
Author: Rob Clark <robdclark at chromium.org>
Date:   Wed Dec 18 11:10:12 2019 -0800

    freedreno/ir3: split out delay helpers
    
    We're going to want these also for a post-RA sched pass.  And also to
    split nop stuffing out into it's own pass.
    
    Signed-off-by: Rob Clark <robdclark at chromium.org>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3569>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=54c795f8297d5087b013777bddac32ed47941cb7
Author: Rob Clark <robdclark at chromium.org>
Date:   Thu Dec 19 09:48:39 2019 -0800

    freedreno/ir3: fix crash when no non-input instructions
    
    This scenario can come up with block-sched and nop-sched moved to after
    RA.  So lets fix it first to keep things bisectable.
    
    Signed-off-by: Rob Clark <robdclark at chromium.org>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3569>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=c1194e10b2dc4d14ea21eb9bc8e607056ebaffcd
Author: Rob Clark <robdclark at chromium.org>
Date:   Tue Dec 17 11:57:14 2019 -0800

    freedreno/ir3: cleanup after lower_locals_to_regs
    
    Signed-off-by: Rob Clark <robdclark at chromium.org>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3569>

URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=f0b792ea0602dd344b8a2dce4ab582b167f6fd35
Author: Rob Clark <robdclark at chromium.org>
Date:   Tue Dec 17 09:09:16 2019 -0800

    freedreno/ir3: shuffle a few ir3_register fields
    
    It makes life easier for postsched to always be able to rely on wrmask.
    
    Signed-off-by: Rob Clark <robdclark at chromium.org>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3569>