Mesa (staging/20.0): aco: fix image_atomic_cmp_swap

[GitLab Mirror]

Module: Mesa
Branch: staging/20.0
Commit: 208fb2edfad8b93c2e944cd0ac7a118d1c1b9635
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=208fb2edfad8b93c2e944cd0ac7a118d1c1b9635

Author: Daniel Schürmann <daniel at schuermann.dev>
Date:   Fri Jan 31 10:41:39 2020 +0100

aco: fix image_atomic_cmp_swap

Fixes: 71440ba0f5512fe455be66ca48b253ecc37478a9 ('aco: reorder VMEM operands in ACO IR')
Reviewed-by: Rhys Perry <pendingchaos02 at gmail.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3652>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3652>
(cherry picked from commit 3b323d66019bcbb56811b66947b39e77a2c7c3e0)

---

 .pick_status.json                            | 2 +-
 src/amd/compiler/aco_register_allocation.cpp | 2 +-
 src/amd/compiler/aco_validate.cpp            | 3 ++-
 3 files changed, 4 insertions(+), 3 deletions(-)

diff --git a/.pick_status.json b/.pick_status.json
index 5f9e9f7f236..ff5862a3f24 100644
--- a/.pick_status.json
+++ b/.pick_status.json
@@ -418,7 +418,7 @@
         "description": "aco: fix image_atomic_cmp_swap",
         "nominated": true,
         "nomination_type": 1,
-        "resolution": 0,
+        "resolution": 1,
         "master_sha": null,
         "because_sha": "71440ba0f5512fe455be66ca48b253ecc37478a9"
     },
diff --git a/src/amd/compiler/aco_register_allocation.cpp b/src/amd/compiler/aco_register_allocation.cpp
index ab61d5515f2..06a887bc1c1 100644
--- a/src/amd/compiler/aco_register_allocation.cpp
+++ b/src/amd/compiler/aco_register_allocation.cpp
@@ -1547,7 +1547,7 @@ void register_allocation(Program *program, std::vector<std::set<Temp>> live_out_
             instr->definitions[0].setFixed(instr->operands[3].physReg());
          } else if (instr->format == Format::MIMG &&
                     instr->definitions.size() == 1 &&
-                    instr->operands[1].regClass() == instr->definitions[0].regClass()) {
+                    instr->operands[1].regClass().type() == RegType::vgpr) {
             instr->definitions[0].setFixed(instr->operands[1].physReg());
          }
 
diff --git a/src/amd/compiler/aco_validate.cpp b/src/amd/compiler/aco_validate.cpp
index 293ec32a330..a479083a54c 100644
--- a/src/amd/compiler/aco_validate.cpp
+++ b/src/amd/compiler/aco_validate.cpp
@@ -244,7 +244,8 @@ void validate(Program* program, FILE * output)
             if (instr->operands[1].hasRegClass() && instr->operands[1].regClass().type() == RegType::sgpr)
                check(instr->operands[1].regClass() == s4, "MIMG operands[1] (sampler constant) must be 4 SGPRs", instr.get());
             else if (instr->operands[1].hasRegClass() && instr->operands[1].regClass().type() == RegType::vgpr)
-               check(instr->definitions.empty() || instr->definitions[0].regClass() == instr->operands[1].regClass(),
+               check((instr->definitions.empty() || instr->definitions[0].regClass() == instr->operands[1].regClass() ||
+                     instr->opcode == aco_opcode::image_atomic_cmpswap || instr->opcode == aco_opcode::image_atomic_fcmpswap),
                      "MIMG operands[1] (VDATA) must be the same as definitions[0] for atomics", instr.get());
             check(instr->operands[2].hasRegClass() && instr->operands[2].regClass().type() == RegType::vgpr,
                   "MIMG operands[2] (VADDR) must be VGPR", instr.get());