Mesa (staging/20.0): intel/fs: Write the address register with NoMask for MOV_INDIRECT
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Mon Feb 3 17:01:08 UTC 2020
Module: Mesa
Branch: staging/20.0
Commit: e6fbf8d9d3b90bec356cdd8a91fee99b222c82fc
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=e6fbf8d9d3b90bec356cdd8a91fee99b222c82fc
Author: Jason Ekstrand <jason at jlekstrand.net>
Date: Thu Jan 30 11:34:51 2020 -0600
intel/fs: Write the address register with NoMask for MOV_INDIRECT
This fixes a hang in the following Vulkan CTS test on TGL-LP:
dEQP-VK.descriptor_indexing.storage_buffer_dynamic_in_loop
Cc: mesa-stable at lists.freedesktop.org
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3642>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3642>
(cherry picked from commit f93dfb509cbf9474befae9919dd8c135bbd67093)
---
.pick_status.json | 2 +-
src/intel/compiler/brw_fs_generator.cpp | 9 +++++++++
2 files changed, 10 insertions(+), 1 deletion(-)
diff --git a/.pick_status.json b/.pick_status.json
index ff5862a3f24..c1130560d42 100644
--- a/.pick_status.json
+++ b/.pick_status.json
@@ -382,7 +382,7 @@
"description": "intel/fs: Write the address register with NoMask for MOV_INDIRECT",
"nominated": true,
"nomination_type": 0,
- "resolution": 0,
+ "resolution": 1,
"master_sha": null,
"because_sha": null
},
diff --git a/src/intel/compiler/brw_fs_generator.cpp b/src/intel/compiler/brw_fs_generator.cpp
index 7c8f7bde339..4f7bc159f07 100644
--- a/src/intel/compiler/brw_fs_generator.cpp
+++ b/src/intel/compiler/brw_fs_generator.cpp
@@ -452,8 +452,17 @@ fs_generator::generate_mov_indirect(fs_inst *inst,
* In the end, while base_offset is nice to look at in the generated
* code, using it saves us 0 instructions and would require quite a bit
* of case-by-case work. It's just not worth it.
+ *
+ * There's some sort of HW bug on Gen12 which causes issues if we write
+ * to the address register in control-flow. Since we only ever touch
+ * the address register from the generator, we can easily enough work
+ * around it by setting NoMask on the add.
*/
+ brw_push_insn_state(p);
+ if (devinfo->gen == 12)
+ brw_set_default_mask_control(p, BRW_MASK_DISABLE);
brw_ADD(p, addr, indirect_byte_offset, brw_imm_uw(imm_byte_offset));
+ brw_pop_insn_state(p);
brw_set_default_swsb(p, tgl_swsb_regdist(1));
if (type_sz(reg.type) > 4 &&
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