Mesa (master): radeon: Use P010 for decoding of 10-bit videos

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Module: Mesa
Branch: master
Commit: 466001a226fd6b6936485204acbe74d971154625
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=466001a226fd6b6936485204acbe74d971154625

Author: Thong Thai <thong.thai at amd.com>
Date:   Wed Dec 18 11:33:22 2019 -0500

radeon: Use P010 for decoding of 10-bit videos

Previously, P016 was used for the decoding of 10-bit HEVC/H.265 encoded
videos, which worked fine for mpv and ffmpeg. GStreamer specifically looks
for P010, so this patch sets the default buffer type to P010 for HEVC
decoding.

Signed-off-by: Thong Thai <thong.thai at amd.com>
Reviewed-by: Leo Liu <leo.liu at amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3153>

---

 src/gallium/drivers/r600/radeon_uvd.c       | 3 ++-
 src/gallium/drivers/radeon/radeon_uvd.c     | 3 ++-
 src/gallium/drivers/radeon/radeon_vcn_dec.c | 6 ++++--
 src/gallium/drivers/radeonsi/si_get.c       | 5 +++--
 4 files changed, 11 insertions(+), 6 deletions(-)

diff --git a/src/gallium/drivers/r600/radeon_uvd.c b/src/gallium/drivers/r600/radeon_uvd.c
index 2a5054f1aef..5c46731a480 100644
--- a/src/gallium/drivers/r600/radeon_uvd.c
+++ b/src/gallium/drivers/r600/radeon_uvd.c
@@ -666,7 +666,8 @@ static struct ruvd_h265 get_h265_msg(struct ruvd_decoder *dec, struct pipe_video
 	}
 
 	if (pic->base.profile == PIPE_VIDEO_PROFILE_HEVC_MAIN_10) {
-		if (target->buffer_format == PIPE_FORMAT_P016) {
+		if (target->buffer_format == PIPE_FORMAT_P010 ||
+			target->buffer_format == PIPE_FORMAT_P016) {
 			result.p010_mode = 1;
 			result.msb_mode = 1;
 		} else {
diff --git a/src/gallium/drivers/radeon/radeon_uvd.c b/src/gallium/drivers/radeon/radeon_uvd.c
index 59ff5a88d53..f570b75dfaa 100644
--- a/src/gallium/drivers/radeon/radeon_uvd.c
+++ b/src/gallium/drivers/radeon/radeon_uvd.c
@@ -741,7 +741,8 @@ static struct ruvd_h265 get_h265_msg(struct ruvd_decoder *dec, struct pipe_video
 	}
 
 	if (pic->base.profile == PIPE_VIDEO_PROFILE_HEVC_MAIN_10) {
-		if (target->buffer_format == PIPE_FORMAT_P016) {
+		if (target->buffer_format == PIPE_FORMAT_P010 ||
+		    target->buffer_format == PIPE_FORMAT_P016) {
 			result.p010_mode = 1;
 			result.msb_mode = 1;
 		} else {
diff --git a/src/gallium/drivers/radeon/radeon_vcn_dec.c b/src/gallium/drivers/radeon/radeon_vcn_dec.c
index 6d0ae7b4ce1..0f903b1629f 100644
--- a/src/gallium/drivers/radeon/radeon_vcn_dec.c
+++ b/src/gallium/drivers/radeon/radeon_vcn_dec.c
@@ -329,7 +329,8 @@ static rvcn_dec_message_hevc_t get_h265_msg(struct radeon_decoder *dec,
 	}
 
 	if (pic->base.profile == PIPE_VIDEO_PROFILE_HEVC_MAIN_10) {
-		if (target->buffer_format == PIPE_FORMAT_P016) {
+		if (target->buffer_format == PIPE_FORMAT_P010 ||
+			target->buffer_format == PIPE_FORMAT_P016) {
 			result.p010_mode = 1;
 			result.msb_mode = 1;
 		} else {
@@ -530,7 +531,8 @@ static rvcn_dec_message_vp9_t get_vp9_msg(struct radeon_decoder *dec,
 	result.ref_frame_sign_bias[2] = pic->picture_parameter.pic_fields.alt_ref_frame_sign_bias;
 
 	if (pic->base.profile == PIPE_VIDEO_PROFILE_VP9_PROFILE2) {
-		if (target->buffer_format == PIPE_FORMAT_P016) {
+		if (target->buffer_format == PIPE_FORMAT_P010 ||
+			target->buffer_format == PIPE_FORMAT_P016) {
 			result.p010_mode = 1;
 			result.msb_mode = 1;
 		} else {
diff --git a/src/gallium/drivers/radeonsi/si_get.c b/src/gallium/drivers/radeonsi/si_get.c
index 4b63d6b7522..c34c8649bcf 100644
--- a/src/gallium/drivers/radeonsi/si_get.c
+++ b/src/gallium/drivers/radeonsi/si_get.c
@@ -686,8 +686,9 @@ static int si_get_video_param(struct pipe_screen *screen,
 			return (sscreen->info.family < CHIP_TONGA) ? 1152 : 4096;
 		}
 	case PIPE_VIDEO_CAP_PREFERED_FORMAT:
-		if (profile == PIPE_VIDEO_PROFILE_HEVC_MAIN_10 ||
-		    profile == PIPE_VIDEO_PROFILE_VP9_PROFILE2)
+		if (profile == PIPE_VIDEO_PROFILE_HEVC_MAIN_10)
+			return PIPE_FORMAT_P010;
+		else if (profile == PIPE_VIDEO_PROFILE_VP9_PROFILE2)
 			return PIPE_FORMAT_P016;
 		else
 			return PIPE_FORMAT_NV12;