Mesa (master): radeonsi: actually enable VBOs in user SGPRs

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Module: Mesa
Branch: master
Commit: 9e699ae69026588d2a4cccc67de07d0b91b40ca1
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=9e699ae69026588d2a4cccc67de07d0b91b40ca1

Author: Marek Olšák <marek.olsak at amd.com>
Date:   Mon Jan 13 21:10:09 2020 -0500

radeonsi: actually enable VBOs in user SGPRs

Fixes: 363b4027fcb - radeonsi: put up to 5 VBO descriptors into user SGPRs
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer at amd.com>

---

 src/gallium/drivers/radeonsi/si_pipe.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/gallium/drivers/radeonsi/si_pipe.c b/src/gallium/drivers/radeonsi/si_pipe.c
index f37a4b222bb..3120d4e0236 100644
--- a/src/gallium/drivers/radeonsi/si_pipe.c
+++ b/src/gallium/drivers/radeonsi/si_pipe.c
@@ -1102,7 +1102,7 @@ radeonsi_screen_create_impl(struct radeon_winsys *ws,
 					    &prim_discard_vertex_count_threshold,
 					    &tmp);
 	/* Compute-shader-based culling doesn't support VBOs in user SGPRs. */
-	if (prim_discard_vertex_count_threshold != UINT_MAX)
+	if (prim_discard_vertex_count_threshold == UINT_MAX)
 		sscreen->num_vbos_in_user_sgprs = sscreen->info.chip_class >= GFX9 ? 5 : 1;
 
 	/* Determine tessellation ring info. */