Mesa (master): iris: Open-code iris_cache_flush_for_read() and iris_cache_flush_for_depth().

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Module: Mesa
Branch: master
Commit: b92818849360d629bff186feb0f580a114600062
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=b92818849360d629bff186feb0f580a114600062

Author: Francisco Jerez <currojerez at riseup.net>
Date:   Wed Feb  5 20:36:35 2020 -0800

iris: Open-code iris_cache_flush_for_read() and iris_cache_flush_for_depth().

These have become one-liners now so they can be easily inlined.

Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3875>

---

 src/gallium/drivers/iris/iris_blorp.c   |  9 ++++++---
 src/gallium/drivers/iris/iris_context.h |  2 --
 src/gallium/drivers/iris/iris_resolve.c | 24 ++++++------------------
 3 files changed, 12 insertions(+), 23 deletions(-)

diff --git a/src/gallium/drivers/iris/iris_blorp.c b/src/gallium/drivers/iris/iris_blorp.c
index b8aa81fb831..4c3f98eb6b2 100644
--- a/src/gallium/drivers/iris/iris_blorp.c
+++ b/src/gallium/drivers/iris/iris_blorp.c
@@ -282,16 +282,19 @@ iris_blorp_exec(struct blorp_batch *blorp_batch,
     * data.
     */
    if (params->src.enabled)
-      iris_cache_flush_for_read(batch, params->src.addr.buffer);
+      iris_emit_buffer_barrier_for(batch, params->src.addr.buffer,
+                                   IRIS_DOMAIN_OTHER_READ);
    if (params->dst.enabled) {
       iris_cache_flush_for_render(batch, params->dst.addr.buffer,
                                   params->dst.view.format,
                                   params->dst.aux_usage);
    }
    if (params->depth.enabled)
-      iris_cache_flush_for_depth(batch, params->depth.addr.buffer);
+      iris_emit_buffer_barrier_for(batch, params->depth.addr.buffer,
+                                   IRIS_DOMAIN_DEPTH_WRITE);
    if (params->stencil.enabled)
-      iris_cache_flush_for_depth(batch, params->stencil.addr.buffer);
+      iris_emit_buffer_barrier_for(batch, params->stencil.addr.buffer,
+                                   IRIS_DOMAIN_DEPTH_WRITE);
 
    iris_require_command_space(batch, 1400);
 
diff --git a/src/gallium/drivers/iris/iris_context.h b/src/gallium/drivers/iris/iris_context.h
index 7827df1f4c1..9d799d888bc 100644
--- a/src/gallium/drivers/iris/iris_context.h
+++ b/src/gallium/drivers/iris/iris_context.h
@@ -911,12 +911,10 @@ void iris_predraw_resolve_framebuffer(struct iris_context *ice,
 void iris_postdraw_update_resolve_tracking(struct iris_context *ice,
                                            struct iris_batch *batch);
 void iris_flush_depth_and_render_caches(struct iris_batch *batch);
-void iris_cache_flush_for_read(struct iris_batch *batch, struct iris_bo *bo);
 void iris_cache_flush_for_render(struct iris_batch *batch,
                                  struct iris_bo *bo,
                                  enum isl_format format,
                                  enum isl_aux_usage aux_usage);
-void iris_cache_flush_for_depth(struct iris_batch *batch, struct iris_bo *bo);
 int iris_get_driver_query_info(struct pipe_screen *pscreen, unsigned index,
                                struct pipe_driver_query_info *info);
 int iris_get_driver_query_group_info(struct pipe_screen *pscreen,
diff --git a/src/gallium/drivers/iris/iris_resolve.c b/src/gallium/drivers/iris/iris_resolve.c
index 95326ec2101..68f37f48bcf 100644
--- a/src/gallium/drivers/iris/iris_resolve.c
+++ b/src/gallium/drivers/iris/iris_resolve.c
@@ -108,7 +108,7 @@ resolve_sampler_views(struct iris_context *ice,
                                        isv->view.array_len);
       }
 
-      iris_cache_flush_for_read(batch, res->bo);
+      iris_emit_buffer_barrier_for(batch, res->bo, IRIS_DOMAIN_OTHER_READ);
    }
 }
 
@@ -146,7 +146,7 @@ resolve_image_views(struct iris_context *ice,
                                       aux_usage, false);
       }
 
-      iris_cache_flush_for_read(batch, res->bo);
+      iris_emit_buffer_barrier_for(batch, res->bo, IRIS_DOMAIN_OTHER_READ);
    }
 }
 
@@ -204,11 +204,13 @@ iris_predraw_resolve_framebuffer(struct iris_context *ice,
                                         zs_surf->u.tex.level,
                                         zs_surf->u.tex.first_layer,
                                         num_layers);
-            iris_cache_flush_for_depth(batch, z_res->bo);
+            iris_emit_buffer_barrier_for(batch, z_res->bo,
+                                         IRIS_DOMAIN_DEPTH_WRITE);
          }
 
          if (s_res) {
-            iris_cache_flush_for_depth(batch, s_res->bo);
+            iris_emit_buffer_barrier_for(batch, s_res->bo,
+                                         IRIS_DOMAIN_DEPTH_WRITE);
          }
       }
    }
@@ -357,13 +359,6 @@ iris_flush_depth_and_render_caches(struct iris_batch *batch)
                                 PIPE_CONTROL_CONST_CACHE_INVALIDATE);
 }
 
-void
-iris_cache_flush_for_read(struct iris_batch *batch,
-                          struct iris_bo *bo)
-{
-   iris_emit_buffer_barrier_for(batch, bo, IRIS_DOMAIN_OTHER_READ);
-}
-
 static void *
 format_aux_tuple(enum isl_format format, enum isl_aux_usage aux_usage)
 {
@@ -412,13 +407,6 @@ iris_cache_flush_for_render(struct iris_batch *batch,
    }
 }
 
-void
-iris_cache_flush_for_depth(struct iris_batch *batch,
-                           struct iris_bo *bo)
-{
-   iris_emit_buffer_barrier_for(batch, bo, IRIS_DOMAIN_DEPTH_WRITE);
-}
-
 static void
 iris_resolve_color(struct iris_context *ice,
                    struct iris_batch *batch,