Mesa (master): iris: Remove batch argument of iris_resource_prepare_access() and friends.
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Wed Jun 3 23:24:44 UTC 2020
Module: Mesa
Branch: master
Commit: 8e8198f34968e6911c2bfdf6b58c505a23cfbc9e
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=8e8198f34968e6911c2bfdf6b58c505a23cfbc9e
Author: Francisco Jerez <currojerez at riseup.net>
Date: Thu Apr 23 18:00:15 2020 -0700
iris: Remove batch argument of iris_resource_prepare_access() and friends.
The resolves performed by this function are only expected to work from
the render batch, so make sure we use it independently of the batch
the caller wants to use. This function provides no synchronization
guarantees anyway, the caller is expected to insert any cache flushing
and synchronization required for the resolved surface to be visible to
the target batch.
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3875>
---
src/gallium/drivers/iris/iris_blit.c | 12 ++++++------
src/gallium/drivers/iris/iris_clear.c | 4 ++--
src/gallium/drivers/iris/iris_resolve.c | 19 +++++++++++--------
src/gallium/drivers/iris/iris_resource.c | 6 ++----
src/gallium/drivers/iris/iris_resource.h | 5 +----
5 files changed, 22 insertions(+), 24 deletions(-)
diff --git a/src/gallium/drivers/iris/iris_blit.c b/src/gallium/drivers/iris/iris_blit.c
index 51667f4c5db..7ba297e2f89 100644
--- a/src/gallium/drivers/iris/iris_blit.c
+++ b/src/gallium/drivers/iris/iris_blit.c
@@ -379,7 +379,7 @@ iris_blit(struct pipe_context *ctx, const struct pipe_blit_info *info)
bool src_clear_supported = isl_aux_usage_has_fast_clears(src_aux_usage) &&
src_res->surf.format == src_fmt.fmt;
- iris_resource_prepare_access(ice, batch, src_res, info->src.level, 1,
+ iris_resource_prepare_access(ice, src_res, info->src.level, 1,
info->src.box.z, info->src.box.depth,
src_aux_usage, src_clear_supported);
@@ -398,7 +398,7 @@ iris_blit(struct pipe_context *ctx, const struct pipe_blit_info *info)
info->dst.resource, dst_aux_usage,
info->dst.level, true);
- iris_resource_prepare_access(ice, batch, dst_res, info->dst.level, 1,
+ iris_resource_prepare_access(ice, dst_res, info->dst.level, 1,
info->dst.box.z, info->dst.box.depth,
dst_aux_usage, dst_clear_supported);
@@ -524,10 +524,10 @@ iris_blit(struct pipe_context *ctx, const struct pipe_blit_info *info)
stc_dst_aux_usage =
iris_resource_blorp_write_aux_usage(ice, stc_dst, dst_fmt.fmt);
- iris_resource_prepare_access(ice, batch, src_res, info->src.level, 1,
+ iris_resource_prepare_access(ice, src_res, info->src.level, 1,
info->src.box.z, info->src.box.depth,
stc_src_aux_usage, false);
- iris_resource_prepare_access(ice, batch, stc_dst, info->dst.level, 1,
+ iris_resource_prepare_access(ice, stc_dst, info->dst.level, 1,
info->dst.box.z, info->dst.box.depth,
stc_dst_aux_usage, false);
iris_blorp_surf_for_resource(&screen->isl_dev, &src_surf,
@@ -680,10 +680,10 @@ iris_copy_region(struct blorp_context *blorp,
iris_blorp_surf_for_resource(&screen->isl_dev, &dst_surf,
dst, dst_aux_usage, dst_level, true);
- iris_resource_prepare_access(ice, batch, src_res, src_level, 1,
+ iris_resource_prepare_access(ice, src_res, src_level, 1,
src_box->z, src_box->depth,
src_aux_usage, src_clear_supported);
- iris_resource_prepare_access(ice, batch, dst_res, dst_level, 1,
+ iris_resource_prepare_access(ice, dst_res, dst_level, 1,
dstz, src_box->depth,
dst_aux_usage, dst_clear_supported);
diff --git a/src/gallium/drivers/iris/iris_clear.c b/src/gallium/drivers/iris/iris_clear.c
index 67730e391ee..6d4f579ebf0 100644
--- a/src/gallium/drivers/iris/iris_clear.c
+++ b/src/gallium/drivers/iris/iris_clear.c
@@ -254,7 +254,7 @@ fast_clear_color(struct iris_context *ice,
* Fortunately, few applications ever change their clear color at
* different levels/layers, so this shouldn't happen often.
*/
- iris_resource_prepare_access(ice, batch, res,
+ iris_resource_prepare_access(ice, res,
res_lvl, 1, layer, 1,
res->aux.usage,
false);
@@ -603,7 +603,7 @@ clear_depth_stencil(struct iris_context *ice,
uint8_t stencil_mask = clear_stencil && stencil_res ? 0xff : 0;
if (stencil_mask) {
- iris_resource_prepare_access(ice, batch, stencil_res, level, 1, box->z,
+ iris_resource_prepare_access(ice, stencil_res, level, 1, box->z,
box->depth, stencil_res->aux.usage, false);
iris_blorp_surf_for_resource(&batch->screen->isl_dev,
&stencil_surf, &stencil_res->base,
diff --git a/src/gallium/drivers/iris/iris_resolve.c b/src/gallium/drivers/iris/iris_resolve.c
index 040bb91038e..4fd8b57b20e 100644
--- a/src/gallium/drivers/iris/iris_resolve.c
+++ b/src/gallium/drivers/iris/iris_resolve.c
@@ -102,7 +102,7 @@ resolve_sampler_views(struct iris_context *ice,
"for sampling");
}
- iris_resource_prepare_texture(ice, batch, res, isv->view.format,
+ iris_resource_prepare_texture(ice, res, isv->view.format,
isv->view.base_level, isv->view.levels,
isv->view.base_array_layer,
isv->view.array_len);
@@ -140,7 +140,7 @@ resolve_image_views(struct iris_context *ice,
enum isl_aux_usage aux_usage =
iris_image_view_aux_usage(ice, pview, info);
- iris_resource_prepare_access(ice, batch, res,
+ iris_resource_prepare_access(ice, res,
pview->u.tex.level, 1,
pview->u.tex.first_layer, num_layers,
aux_usage, false);
@@ -219,7 +219,7 @@ iris_predraw_resolve_framebuffer(struct iris_context *ice,
struct iris_surface *surf = (void *) cso_fb->cbufs[i];
struct iris_resource *res = (void *) cso_fb->cbufs[i]->texture;
- iris_resource_prepare_texture(ice, batch, res, surf->view.format,
+ iris_resource_prepare_texture(ice, res, surf->view.format,
surf->view.base_level, 1,
surf->view.base_array_layer,
surf->view.array_len);
@@ -817,13 +817,17 @@ iris_has_color_unresolved(const struct iris_resource *res,
void
iris_resource_prepare_access(struct iris_context *ice,
- struct iris_batch *batch,
struct iris_resource *res,
uint32_t start_level, uint32_t num_levels,
uint32_t start_layer, uint32_t num_layers,
enum isl_aux_usage aux_usage,
bool fast_clear_supported)
{
+ /* We can't do resolves on the compute engine, so awkwardly, we have to
+ * do them on the render batch...
+ */
+ struct iris_batch *batch = &ice->batches[IRIS_BATCH_RENDER];
+
const uint32_t clamped_levels =
miptree_level_range_length(res, start_level, num_levels);
for (uint32_t l = 0; l < clamped_levels; l++) {
@@ -1051,7 +1055,6 @@ isl_formats_are_fast_clear_compatible(enum isl_format a, enum isl_format b)
void
iris_resource_prepare_texture(struct iris_context *ice,
- struct iris_batch *batch,
struct iris_resource *res,
enum isl_format view_format,
uint32_t start_level, uint32_t num_levels,
@@ -1069,7 +1072,7 @@ iris_resource_prepare_texture(struct iris_context *ice,
if (!isl_formats_are_fast_clear_compatible(res->surf.format, view_format))
clear_supported = false;
- iris_resource_prepare_access(ice, batch, res, start_level, num_levels,
+ iris_resource_prepare_access(ice, res, start_level, num_levels,
start_layer, num_layers,
aux_usage, clear_supported);
}
@@ -1123,7 +1126,7 @@ iris_resource_prepare_render(struct iris_context *ice,
uint32_t start_layer, uint32_t layer_count,
enum isl_aux_usage aux_usage)
{
- iris_resource_prepare_access(ice, batch, res, level, 1, start_layer,
+ iris_resource_prepare_access(ice, res, level, 1, start_layer,
layer_count, aux_usage,
isl_aux_usage_has_fast_clears(aux_usage));
}
@@ -1144,7 +1147,7 @@ iris_resource_prepare_depth(struct iris_context *ice,
struct iris_resource *res, uint32_t level,
uint32_t start_layer, uint32_t layer_count)
{
- iris_resource_prepare_access(ice, batch, res, level, 1, start_layer,
+ iris_resource_prepare_access(ice, res, level, 1, start_layer,
layer_count, res->aux.usage, !!res->aux.bo);
}
diff --git a/src/gallium/drivers/iris/iris_resource.c b/src/gallium/drivers/iris/iris_resource.c
index 7211abec65a..48ca9faf15b 100644
--- a/src/gallium/drivers/iris/iris_resource.c
+++ b/src/gallium/drivers/iris/iris_resource.c
@@ -1108,11 +1108,10 @@ static void
iris_flush_resource(struct pipe_context *ctx, struct pipe_resource *resource)
{
struct iris_context *ice = (struct iris_context *)ctx;
- struct iris_batch *render_batch = &ice->batches[IRIS_BATCH_RENDER];
struct iris_resource *res = (void *) resource;
const struct isl_drm_modifier_info *mod = res->mod_info;
- iris_resource_prepare_access(ice, render_batch, res,
+ iris_resource_prepare_access(ice, res,
0, INTEL_REMAINING_LEVELS,
0, INTEL_REMAINING_LAYERS,
mod ? mod->aux_usage : ISL_AUX_USAGE_NONE,
@@ -1918,8 +1917,7 @@ iris_transfer_map(struct pipe_context *ctx,
/* Otherwise we're free to map on the CPU. */
if (need_resolve) {
- iris_resource_access_raw(ice, &ice->batches[IRIS_BATCH_RENDER], res,
- level, box->z, box->depth,
+ iris_resource_access_raw(ice, res, level, box->z, box->depth,
usage & PIPE_TRANSFER_WRITE);
}
diff --git a/src/gallium/drivers/iris/iris_resource.h b/src/gallium/drivers/iris/iris_resource.h
index a8a7ab6890f..955b8269a70 100644
--- a/src/gallium/drivers/iris/iris_resource.h
+++ b/src/gallium/drivers/iris/iris_resource.h
@@ -370,7 +370,6 @@ iris_hiz_exec(struct iris_context *ice,
*/
void
iris_resource_prepare_access(struct iris_context *ice,
- struct iris_batch *batch,
struct iris_resource *res,
uint32_t start_level, uint32_t num_levels,
uint32_t start_layer, uint32_t num_layers,
@@ -433,13 +432,12 @@ iris_resource_set_aux_state(struct iris_context *ice,
*/
static inline void
iris_resource_access_raw(struct iris_context *ice,
- struct iris_batch *batch,
struct iris_resource *res,
uint32_t level, uint32_t layer,
uint32_t num_layers,
bool write)
{
- iris_resource_prepare_access(ice, batch, res, level, 1, layer, num_layers,
+ iris_resource_prepare_access(ice, res, level, 1, layer, num_layers,
ISL_AUX_USAGE_NONE, false);
if (write) {
iris_resource_finish_write(ice, res, level, layer, num_layers,
@@ -458,7 +456,6 @@ enum isl_aux_usage iris_resource_texture_aux_usage(struct iris_context *ice,
const struct iris_resource *res,
enum isl_format view_fmt);
void iris_resource_prepare_texture(struct iris_context *ice,
- struct iris_batch *batch,
struct iris_resource *res,
enum isl_format view_format,
uint32_t start_level, uint32_t num_levels,
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