Mesa (master): freedreno/ir3: Drop the max_const on a6xx to 512.

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Module: Mesa
Branch: master
Commit: e349f502792e927a1acdeaf00e591878bd18c837
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=e349f502792e927a1acdeaf00e591878bd18c837

Author: Eric Anholt <eric at anholt.net>
Date:   Fri May 29 16:35:43 2020 -0700

freedreno/ir3: Drop the max_const on a6xx to 512.

The GLES blob on the p3a limits constlen to 512 between VS and FS across
a6xx gpu ids (615, 630, 640, and 650).  Experimentally, exceeding that
limit in any one stage results in rendering corruption or GPU hangs
(though my most detailed testing had a loop limit in a uniform, so that
may the cause of the hang).  Clamp the limit we use inside of a shader so
we don't exceed it within a stage.

This commit doesn't resovle limiting inter-stage.  Experimentally, I've
found that I can push up to a total of ~768 vec4s between VS and FS on
a630, with or without uniform updates between each draw.  We'll need to do
some shader key-based limiting of constlen at draw time to respect that
limit, but that's left for future work, and this commit is enough for the
google earth case that initiated this work.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5273>

---

 src/freedreno/ir3/ir3_compiler.c | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/src/freedreno/ir3/ir3_compiler.c b/src/freedreno/ir3/ir3_compiler.c
index 366e2008f8b..76404fd7a52 100644
--- a/src/freedreno/ir3/ir3_compiler.c
+++ b/src/freedreno/ir3/ir3_compiler.c
@@ -73,7 +73,10 @@ struct ir3_compiler * ir3_compiler_create(struct fd_device *dev, uint32_t gpu_id
 		compiler->unminify_coords = false;
 		compiler->txf_ms_with_isaml = false;
 		compiler->array_index_add_half = true;
-		compiler->max_const = 1024;
+		/* Some a6xxs can apparently do 640 consts, but not all.  Need to
+		 * characterize this better across GPUs
+		 */
+		compiler->max_const = 512;
 		compiler->const_upload_unit = 4;
 	} else {
 		/* no special handling for "flat" */