Mesa (master): freedreno/ir3: shuffle some variant fields

[GitLab Mirror]

Module: Mesa
Branch: master
Commit: fdbe1ffaf74c4b1e913947cff5f3f40ab7b5feca
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=fdbe1ffaf74c4b1e913947cff5f3f40ab7b5feca

Author: Rob Clark <robdclark at chromium.org>
Date:   Fri Jun  5 12:07:02 2020 -0700

freedreno/ir3: shuffle some variant fields

Just to group together the parts that will get serialized when we have
shader disk-cache.

Signed-off-by: Rob Clark <robdclark at chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5372>

---

 src/freedreno/ir3/ir3_shader.h | 31 ++++++++++++++++++++-----------
 1 file changed, 20 insertions(+), 11 deletions(-)

diff --git a/src/freedreno/ir3/ir3_shader.h b/src/freedreno/ir3/ir3_shader.h
index 8e154428c53..cbbdce767ee 100644
--- a/src/freedreno/ir3/ir3_shader.h
+++ b/src/freedreno/ir3/ir3_shader.h
@@ -451,6 +451,10 @@ struct ir3_ibo_mapping {
 /* Represents half register in regid */
 #define HALF_REG_ID    0x100
 
+/**
+ * Shader variant which contains the actual hw shader instructions,
+ * and necessary info for shader state setup.
+ */
 struct ir3_shader_variant {
 	struct fd_bo *bo;
 
@@ -468,12 +472,22 @@ struct ir3_shader_variant {
 		struct ir3_shader_variant *nonbinning;
 //	};
 
-	struct ir3_info info;
-	struct ir3 *ir;
+	struct ir3 *ir;     /* freed after assembling machine instructions */
+
+	/* shader variants form a linked list: */
+	struct ir3_shader_variant *next;
+
+	/* replicated here to avoid passing extra ptrs everywhere: */
+	gl_shader_stage type;
+	struct ir3_shader *shader;
 
 	/* The actual binary shader instructions, size given by info.sizedwords: */
 	uint32_t *bin;
 
+	struct ir3_const_state *const_state;
+
+	struct ir3_info info;
+
 	/* Levels of nesting of flow control:
 	 */
 	unsigned branchstack;
@@ -492,8 +506,6 @@ struct ir3_shader_variant {
 	 */
 	unsigned constlen;
 
-	struct ir3_const_state *const_state;
-
 	/* About Linkage:
 	 *   + Let the frag shader determine the position/compmask for the
 	 *     varyings, since it is the place where we know if the varying
@@ -610,13 +622,6 @@ struct ir3_shader_variant {
 		unsigned orig_idx[16];
 	} astc_srgb;
 
-	/* shader variants form a linked list: */
-	struct ir3_shader_variant *next;
-
-	/* replicated here to avoid passing extra ptrs everywhere: */
-	gl_shader_stage type;
-	struct ir3_shader *shader;
-
 	/* texture sampler pre-dispatches */
 	uint32_t num_sampler_prefetch;
 	struct ir3_sampler_prefetch sampler_prefetch[IR3_MAX_SAMPLER_PREFETCH];
@@ -639,6 +644,10 @@ ir3_shader_stage(struct ir3_shader_variant *v)
 }
 
 
+/**
+ * Represents a shader at the API level, before state-specific variants are
+ * generated.
+ */
 struct ir3_shader {
 	gl_shader_stage type;