Mesa (master): aco: implement 8-bit/16-bit nir_intrinsic_read_first_invocation

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Module: Mesa
Branch: master
Commit: f03e56eaf0bdd94098960ca6d8b49564f5757992
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=f03e56eaf0bdd94098960ca6d8b49564f5757992

Author: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Date:   Wed Apr  8 09:17:38 2020 +0200

aco: implement 8-bit/16-bit nir_intrinsic_read_first_invocation

Signed-off-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02 at gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4494>

---

 src/amd/compiler/aco_instruction_selection.cpp | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/amd/compiler/aco_instruction_selection.cpp b/src/amd/compiler/aco_instruction_selection.cpp
index a5eee112371..47376511ed5 100644
--- a/src/amd/compiler/aco_instruction_selection.cpp
+++ b/src/amd/compiler/aco_instruction_selection.cpp
@@ -7584,7 +7584,7 @@ void visit_intrinsic(isel_context *ctx, nir_intrinsic_instr *instr)
    case nir_intrinsic_read_first_invocation: {
       Temp src = get_ssa_temp(ctx, instr->src[0].ssa);
       Temp dst = get_ssa_temp(ctx, &instr->dest.ssa);
-      if (src.regClass() == v1) {
+      if (src.regClass() == v1b || src.regClass() == v2b || src.regClass() == v1) {
          emit_wqm(ctx,
                   bld.vop1(aco_opcode::v_readfirstlane_b32, bld.def(s1), src),
                   dst);