Mesa (staging/21.2): aco: Emit zero for the derivatives of uniforms.

[GitLab Mirror]

Module: Mesa
Branch: staging/21.2
Commit: 30c3079cd0cf749efb194f3ea660906013786451
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=30c3079cd0cf749efb194f3ea660906013786451

Author: Timur Kristóf <timur.kristof at gmail.com>
Date:   Thu Aug 26 16:36:28 2021 +0200

aco: Emit zero for the derivatives of uniforms.

Observed in a shader from Resident Evil Village.
This also helps prevent emitting invalid IR.

Cc: mesa-stable
Signed-off-by: Timur Kristóf <timur.kristof at gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02 at gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12599>
(cherry picked from commit cfb0d931f27438c1f7c94defa078f2f9454c5a54)

---

 .pick_status.json                              | 2 +-
 src/amd/compiler/aco_instruction_selection.cpp | 8 ++++++++
 2 files changed, 9 insertions(+), 1 deletion(-)

diff --git a/.pick_status.json b/.pick_status.json
index 9d5884a0077..b1fd75ba9d4 100644
--- a/.pick_status.json
+++ b/.pick_status.json
@@ -247,7 +247,7 @@
         "description": "aco: Emit zero for the derivatives of uniforms.",
         "nominated": true,
         "nomination_type": 0,
-        "resolution": 0,
+        "resolution": 1,
         "main_sha": null,
         "because_sha": null
     },
diff --git a/src/amd/compiler/aco_instruction_selection.cpp b/src/amd/compiler/aco_instruction_selection.cpp
index fa0bf6b65e2..ccf50faa157 100644
--- a/src/amd/compiler/aco_instruction_selection.cpp
+++ b/src/amd/compiler/aco_instruction_selection.cpp
@@ -3509,6 +3509,14 @@ visit_alu_instr(isel_context* ctx, nir_alu_instr* instr)
    case nir_op_fddy_fine:
    case nir_op_fddx_coarse:
    case nir_op_fddy_coarse: {
+      if (!nir_src_is_divergent(instr->src[0].src)) {
+         /* Source is the same in all lanes, so the derivative is zero.
+          * This also avoids emitting invalid IR.
+          */
+         bld.copy(Definition(dst), Operand::zero());
+         break;
+      }
+
       Temp src = as_vgpr(ctx, get_alu_src(ctx, instr->src[0]));
       uint16_t dpp_ctrl1, dpp_ctrl2;
       if (instr->op == nir_op_fddx_fine) {