Mesa (staging/21.2): radv: disable DCC image stores on Navi12-14 for displayable DCC corruption

[GitLab Mirror]

Module: Mesa
Branch: staging/21.2
Commit: 6f312eccb390bdcae197e57acfc325f20a6a1494
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=6f312eccb390bdcae197e57acfc325f20a6a1494

Author: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Date:   Tue Aug 24 16:52:50 2021 +0200

radv: disable DCC image stores on Navi12-14 for displayable DCC corruption

DCC image stores require 128B but 64B is used for displayable DCC.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5265
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5106
Cc: 21.2 mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12521>
(cherry picked from commit 0c550a5fe69271cb01026a3f05d1c918e6552b04)

---

 .pick_status.json           |  2 +-
 src/amd/vulkan/radv_image.c | 17 +++++++++++++++--
 2 files changed, 16 insertions(+), 3 deletions(-)

diff --git a/.pick_status.json b/.pick_status.json
index b1fd75ba9d4..71e5e4e8bfe 100644
--- a/.pick_status.json
+++ b/.pick_status.json
@@ -94,7 +94,7 @@
         "description": "radv: disable DCC image stores on Navi12-14 for displayable DCC corruption",
         "nominated": true,
         "nomination_type": 0,
-        "resolution": 0,
+        "resolution": 1,
         "main_sha": null,
         "because_sha": null
     },
diff --git a/src/amd/vulkan/radv_image.c b/src/amd/vulkan/radv_image.c
index f53c46059ea..56dea6c36ff 100644
--- a/src/amd/vulkan/radv_image.c
+++ b/src/amd/vulkan/radv_image.c
@@ -226,7 +226,7 @@ radv_use_dcc_for_image(struct radv_device *device, const struct radv_image *imag
     * decompressing a lot anyway we might as well not have DCC.
     */
    if ((pCreateInfo->usage & VK_IMAGE_USAGE_STORAGE_BIT) &&
-       (!radv_image_use_dcc_image_stores(device, image) ||
+       (device->physical_device->rad_info.chip_class < GFX10 ||
         radv_formats_is_atomic_allowed(pCreateInfo->pNext, format, pCreateInfo->flags)))
       return false;
 
@@ -276,7 +276,20 @@ radv_use_dcc_for_image(struct radv_device *device, const struct radv_image *imag
 bool
 radv_image_use_dcc_image_stores(const struct radv_device *device, const struct radv_image *image)
 {
-   return device->physical_device->rad_info.chip_class >= GFX10;
+   /* DCC image stores is only available for GFX10+. */
+   if (device->physical_device->rad_info.chip_class < GFX10)
+      return false;
+
+   if ((device->physical_device->rad_info.family == CHIP_NAVI12 ||
+        device->physical_device->rad_info.family == CHIP_NAVI14) &&
+       !image->planes[0].surface.u.gfx9.color.dcc.independent_128B_blocks) {
+      /* Do not enable DCC image stores because INDEPENDENT_128B_BLOCKS is required, and 64B is used
+       * for displayable DCC on NAVI12-14.
+       */
+      return false;
+   }
+
+   return true;
 }
 
 /*