Mesa (master): radeonsi: pass radeon_cmdbuf to si_cp_dma_wait_for_idle
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Thu Jan 7 09:30:09 UTC 2021
Module: Mesa
Branch: master
Commit: b94104c0c02b41e1aee1e0acf32e09159df91bf3
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=b94104c0c02b41e1aee1e0acf32e09159df91bf3
Author: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer at amd.com>
Date: Tue Dec 8 10:59:57 2020 +0100
radeonsi: pass radeon_cmdbuf to si_cp_dma_wait_for_idle
Reviewed-by: Marek Olšák <marek.olsak at amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8002>
---
src/gallium/drivers/radeonsi/si_cp_dma.c | 4 ++--
src/gallium/drivers/radeonsi/si_gfx_cs.c | 2 +-
src/gallium/drivers/radeonsi/si_pipe.h | 2 +-
3 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/src/gallium/drivers/radeonsi/si_cp_dma.c b/src/gallium/drivers/radeonsi/si_cp_dma.c
index d1b764e6bae..b911d3e839c 100644
--- a/src/gallium/drivers/radeonsi/si_cp_dma.c
+++ b/src/gallium/drivers/radeonsi/si_cp_dma.c
@@ -132,7 +132,7 @@ static void si_emit_cp_dma(struct si_context *sctx, struct radeon_cmdbuf *cs, ui
}
}
-void si_cp_dma_wait_for_idle(struct si_context *sctx)
+void si_cp_dma_wait_for_idle(struct si_context *sctx, struct radeon_cmdbuf *cs)
{
/* Issue a dummy DMA that copies zero bytes.
*
@@ -140,7 +140,7 @@ void si_cp_dma_wait_for_idle(struct si_context *sctx)
* DMA request, however, the CP will see the sync flag and still wait
* for all DMAs to complete.
*/
- si_emit_cp_dma(sctx, &sctx->gfx_cs, 0, 0, 0, CP_DMA_SYNC, L2_BYPASS);
+ si_emit_cp_dma(sctx, cs, 0, 0, 0, CP_DMA_SYNC, L2_BYPASS);
}
static void si_cp_dma_prepare(struct si_context *sctx, struct pipe_resource *dst,
diff --git a/src/gallium/drivers/radeonsi/si_gfx_cs.c b/src/gallium/drivers/radeonsi/si_gfx_cs.c
index 08042c93725..6ac1233e3a9 100644
--- a/src/gallium/drivers/radeonsi/si_gfx_cs.c
+++ b/src/gallium/drivers/radeonsi/si_gfx_cs.c
@@ -141,7 +141,7 @@ void si_flush_gfx_cs(struct si_context *ctx, unsigned flags, struct pipe_fence_h
/* Make sure CP DMA is idle at the end of IBs after L2 prefetches
* because the kernel doesn't wait for it. */
if (ctx->chip_class >= GFX7)
- si_cp_dma_wait_for_idle(ctx);
+ si_cp_dma_wait_for_idle(ctx, &ctx->gfx_cs);
/* Wait for draw calls to finish if needed. */
if (wait_flags) {
diff --git a/src/gallium/drivers/radeonsi/si_pipe.h b/src/gallium/drivers/radeonsi/si_pipe.h
index 3f63c7ad190..113c2f79676 100644
--- a/src/gallium/drivers/radeonsi/si_pipe.h
+++ b/src/gallium/drivers/radeonsi/si_pipe.h
@@ -1385,7 +1385,7 @@ void si_init_compute_blit_functions(struct si_context *sctx);
(SI_CPDMA_SKIP_CHECK_CS_SPACE | SI_CPDMA_SKIP_SYNC_AFTER | SI_CPDMA_SKIP_SYNC_BEFORE | \
SI_CPDMA_SKIP_GFX_SYNC | SI_CPDMA_SKIP_BO_LIST_UPDATE | SI_CPDMA_SKIP_TMZ)
-void si_cp_dma_wait_for_idle(struct si_context *sctx);
+void si_cp_dma_wait_for_idle(struct si_context *sctx, struct radeon_cmdbuf *cs);
void si_cp_dma_clear_buffer(struct si_context *sctx, struct radeon_cmdbuf *cs,
struct pipe_resource *dst, uint64_t offset, uint64_t size,
unsigned value, unsigned user_flags, enum si_coherency coher,
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