Mesa (master): gv100/ir: Use system wide atomics

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Module: Mesa
Branch: master
Commit: 7f9a084e7e10769c1a297d4aaca569ca99ef0ba4
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=7f9a084e7e10769c1a297d4aaca569ca99ef0ba4

Author: Alistair Popple <apopple at nvidia.com>
Date:   Mon Dec  7 12:23:17 2020 +1100

gv100/ir: Use system wide atomics

Increase the scope of atomic operations from GPU to system. This is
required for support of SVM to ensure atomic access is maintained for
memory buffers that are not local to the current GPU.

Signed-off-by: Alistair Popple <apopple at nvidia.com>
Reviewed-by: Ben Skeggs <bskeggs at redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7955>

---

 src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gv100.cpp | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gv100.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gv100.cpp
index 1d60bc766ab..8da45ad517d 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gv100.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gv100.cpp
@@ -863,7 +863,7 @@ CodeEmitterGV100::emitATOM()
 
    emitPRED (81);
    emitField(79, 2, 2); // .INVALID0/./.STRONG/.INVALID3
-   emitField(77, 2, 2); // .CTA/.SM/.GPU/.SYS
+   emitField(77, 2, 3); // .CTA/.SM/.GPU/.SYS
    emitField(72, 1, insn->src(0).getIndirect(0)->getSize() == 8);
    emitGPR  (32, insn->src(1));
    emitADDR (24, 40, 24, 0, insn->src(0));
@@ -1101,7 +1101,7 @@ CodeEmitterGV100::emitRED()
    emitField(87, 3, insn->subOp);
    emitField(84, 3, 1); // 0=.EF, 1=, 2=.EL, 3=.LU, 4=.EU, 5=.NA
    emitField(79, 2, 2); // .INVALID0/./.STRONG/.INVALID3
-   emitField(77, 2, 2); // .CTA/.SM/.GPU/.SYS
+   emitField(77, 2, 3); // .CTA/.SM/.GPU/.SYS
    emitField(73, 3, dType);
    emitField(72, 1, insn->src(0).getIndirect(0)->getSize() == 8);
    emitGPR  (32, insn->src(1));