Mesa (master): radv: add support for fast-clearing DCC levels on GFX10+

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Module: Mesa
Branch: master
Commit: 755a8313fcf33a5646c8e7e2dd05adf73814dead
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=755a8313fcf33a5646c8e7e2dd05adf73814dead

Author: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Date:   Wed Jan 13 10:34:03 2021 +0100

radv: add support for fast-clearing DCC levels on GFX10+

Signed-off-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8468>

---

 src/amd/vulkan/radv_meta_clear.c | 9 ++++-----
 1 file changed, 4 insertions(+), 5 deletions(-)

diff --git a/src/amd/vulkan/radv_meta_clear.c b/src/amd/vulkan/radv_meta_clear.c
index 4cad6c57bb4..cb7e86524b8 100644
--- a/src/amd/vulkan/radv_meta_clear.c
+++ b/src/amd/vulkan/radv_meta_clear.c
@@ -1413,11 +1413,10 @@ radv_clear_dcc(struct radv_cmd_buffer *cmd_buffer,
 		uint64_t size;
 
 		if (cmd_buffer->device->physical_device->rad_info.chip_class >= GFX10) {
-			/* Mipmap levels aren't implemented. */
-			assert(level == 0);
-
-			offset += image->planes[0].surface.dcc_slice_size * range->baseArrayLayer;
-			size = image->planes[0].surface.dcc_slice_size * layer_count;
+			/* DCC for mipmaps+layers is currently disabled. */
+			offset += image->planes[0].surface.dcc_slice_size * range->baseArrayLayer +
+				  image->planes[0].surface.u.gfx9.dcc_levels[level].offset;
+			size = image->planes[0].surface.u.gfx9.dcc_levels[level].size * layer_count;
 		} else if (cmd_buffer->device->physical_device->rad_info.chip_class == GFX9) {
 			/* Mipmap levels and layers aren't implemented. */
 			assert(level == 0);