Mesa (master): freedreno/a2xx: fix/add RBBM perfcounter

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Module: Mesa
Branch: master
Commit: 040ffee71f7e5ea70dfda1a35749f2be3c8b751b
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=040ffee71f7e5ea70dfda1a35749f2be3c8b751b

Author: Joel Linn <jl at conductive.de>
Date:   Wed Nov 18 00:41:10 2020 +0100

freedreno/a2xx: fix/add RBBM perfcounter

Xenos driver read two perf counters and their order is also different.

v2: fix typo in register address

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7666>

---

 src/freedreno/perfcntrs/fd2_perfcntr.c  | 1 +
 src/freedreno/registers/adreno/a2xx.xml | 9 ++++++---
 2 files changed, 7 insertions(+), 3 deletions(-)

diff --git a/src/freedreno/perfcntrs/fd2_perfcntr.c b/src/freedreno/perfcntrs/fd2_perfcntr.c
index a0f1ef8b3c0..5231ddb0902 100644
--- a/src/freedreno/perfcntrs/fd2_perfcntr.c
+++ b/src/freedreno/perfcntrs/fd2_perfcntr.c
@@ -947,6 +947,7 @@ static const struct fd_perfcntr_counter mh_counters[] = {
 };
 
 static const struct fd_perfcntr_counter rbbm_counters[] = {
+	COUNTER(RBBM_PERFCOUNTER0_SELECT, RBBM_PERFCOUNTER0_LO, RBBM_PERFCOUNTER0_HI),
 	COUNTER(RBBM_PERFCOUNTER1_SELECT, RBBM_PERFCOUNTER1_LO, RBBM_PERFCOUNTER1_HI),
 };
 
diff --git a/src/freedreno/registers/adreno/a2xx.xml b/src/freedreno/registers/adreno/a2xx.xml
index 8e7f778f56e..b6ea7cd43a6 100644
--- a/src/freedreno/registers/adreno/a2xx.xml
+++ b/src/freedreno/registers/adreno/a2xx.xml
@@ -1075,9 +1075,12 @@ xsi:schemaLocation="http://nouveau.freedesktop.org/ rules-ng.xsd">
 	<reg32 offset="0x0047" name="MH_MMU_MPU_END"/>
 
 	<reg32 offset="0x0394" name="NQWAIT_UNTIL"/>
-	<reg32 offset="0x0395" name="RBBM_PERFCOUNTER1_SELECT"/>
-	<reg32 offset="0x0397" name="RBBM_PERFCOUNTER1_LO"/>
-	<reg32 offset="0x0398" name="RBBM_PERFCOUNTER1_HI"/>
+	<reg32 offset="0x0395" name="RBBM_PERFCOUNTER0_SELECT"/>
+	<reg32 offset="0x0396" name="RBBM_PERFCOUNTER1_SELECT"/>
+	<reg32 offset="0x0397" name="RBBM_PERFCOUNTER0_LO"/>
+	<reg32 offset="0x0398" name="RBBM_PERFCOUNTER0_HI"/>
+	<reg32 offset="0x0399" name="RBBM_PERFCOUNTER1_LO"/>
+	<reg32 offset="0x039a" name="RBBM_PERFCOUNTER1_HI"/>
 	<reg32 offset="0x039b" name="RBBM_DEBUG"/>
 	<reg32 offset="0x039c" name="RBBM_PM_OVERRIDE1">
 		<bitfield name="RBBM_AHBCLK_PM_OVERRIDE" pos="0" type="boolean"/>