Mesa (staging/21.0): anv: fix invalid programming of BLEND_STATE

[GitLab Mirror]

Module: Mesa
Branch: staging/21.0
Commit: a9faff69f6ea4f6c29eb78ef563fb3fdcbd672d7
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=a9faff69f6ea4f6c29eb78ef563fb3fdcbd672d7

Author: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
Date:   Mon Jan 25 13:23:08 2021 +0200

anv: fix invalid programming of BLEND_STATE

We can't enable Logic Op & Color Buffer Blend. The Vulkan spec seems
to say Logic Op discards blending.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
Cc: mesa-stable at lists.freedesktop.org
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3767
Reviewed-by: Sagar Ghuge <sagar.ghuge at intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8691>
(cherry picked from commit 998f38bd9934e9eff156505244032c28df9fba31)

---

 .pick_status.json                |  2 +-
 src/intel/vulkan/genX_pipeline.c | 17 ++++++++++++++++-
 2 files changed, 17 insertions(+), 2 deletions(-)

diff --git a/.pick_status.json b/.pick_status.json
index e728f69194f..a39174f69ba 100644
--- a/.pick_status.json
+++ b/.pick_status.json
@@ -346,7 +346,7 @@
         "description": "anv: fix invalid programming of BLEND_STATE",
         "nominated": true,
         "nomination_type": 0,
-        "resolution": 0,
+        "resolution": 1,
         "master_sha": null,
         "because_sha": null
     },
diff --git a/src/intel/vulkan/genX_pipeline.c b/src/intel/vulkan/genX_pipeline.c
index 205e8677f19..33f071019b7 100644
--- a/src/intel/vulkan/genX_pipeline.c
+++ b/src/intel/vulkan/genX_pipeline.c
@@ -1180,7 +1180,22 @@ emit_cb_state(struct anv_graphics_pipeline *pipeline,
 #endif
          .LogicOpEnable = info->logicOpEnable,
          .LogicOpFunction = vk_to_gen_logic_op[info->logicOp],
-         .ColorBufferBlendEnable = a->blendEnable,
+         /* Vulkan specification 1.2.168, VkLogicOp:
+          *
+          *   "Logical operations are controlled by the logicOpEnable and
+          *    logicOp members of VkPipelineColorBlendStateCreateInfo. If
+          *    logicOpEnable is VK_TRUE, then a logical operation selected by
+          *    logicOp is applied between each color attachment and the
+          *    fragment’s corresponding output value, and blending of all
+          *    attachments is treated as if it were disabled."
+          *
+          * From the Broadwell PRM Volume 2d: Command Reference: Structures:
+          * BLEND_STATE_ENTRY:
+          *
+          *   "Enabling LogicOp and Color Buffer Blending at the same time is
+          *    UNDEFINED"
+          */
+         .ColorBufferBlendEnable = !info->logicOpEnable && a->blendEnable,
          .ColorClampRange = COLORCLAMP_RTFORMAT,
          .PreBlendColorClampEnable = true,
          .PostBlendColorClampEnable = true,