Mesa (main): 103 new commits
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Thu Jun 10 18:36:10 UTC 2021
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=e380229bde242c24d50d33b9e6e96f948ed59f0d
Author: Alyssa Rosenzweig <alyssa at collabora.com>
Date: Wed Jun 9 16:15:19 2021 -0400
docs/panfrost: Update API versions
Signed-off-by: Alyssa Rosenzweig <alyssa at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=a9f3295f67f63b45d735a442df48b374bfe0b368
Author: Alyssa Rosenzweig <alyssa at collabora.com>
Date: Thu Jun 3 18:00:29 2021 -0400
docs/features: Mark GLES3.1 as done on Panfrost
Signed-off-by: Alyssa Rosenzweig <alyssa at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=b338654b193e2f29ccb5da4ef61d461d04773569
Author: Alyssa Rosenzweig <alyssa at collabora.com>
Date: Thu Jun 10 13:18:04 2021 -0400
panfrost/ci: Do fractional dEQP-GLES31 run on Midgard
Drop the skip list and correspondingly populate the fails list.
Signed-off-by: Alyssa Rosenzweig <alyssa at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=eabb86c2240f0d6e81c5f8ed79a1bab1dfe8ba60
Author: Alyssa Rosenzweig <alyssa at collabora.com>
Date: Thu Jun 10 13:16:56 2021 -0400
panfrost/ci: Don't skip SSBO tests on G52
These were blocked on failing RA, but that's been resolved now.
Signed-off-by: Alyssa Rosenzweig <alyssa at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=140f9222bc4c97b94e8613e12f7d79a1fa062acd
Author: Alyssa Rosenzweig <alyssa at collabora.com>
Date: Wed Jun 2 15:03:29 2021 -0400
panfrost/ci: Blank G52 flakes file
Haven't seen these tests flake, and we don't even run dEQP-GLES2 on G52
in CI anymore. (I still do local runs, and I don't see them flake
there.)
Signed-off-by: Alyssa Rosenzweig <alyssa at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=a88fa74d8e199e9ca78430a26b990682e3f16a18
Author: Alyssa Rosenzweig <alyssa at collabora.com>
Date: Wed Jun 9 16:43:29 2021 -0400
pan/decode: Handle cache flush jobs
Signed-off-by: Alyssa Rosenzweig <alyssa at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=866c22bff5b9db208430d5d067f57823126b4afe
Author: Alyssa Rosenzweig <alyssa at collabora.com>
Date: Wed Jun 2 15:42:05 2021 -0400
pan/decode: Fix image attribute counting
Signed-off-by: Alyssa Rosenzweig <alyssa at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=1cc3f8cb644363c9f3d9cc5890cc72bc0b337b97
Author: Alyssa Rosenzweig <alyssa at collabora.com>
Date: Thu Jun 3 18:07:09 2021 -0400
panfrost: Advertise GLES3.1
We have CI, we're just a few tests away from conformance on v7, and
Midgard is just a few hundred tests behind. Given the branch point isn't
for another month, I think this is a good time to flip the switch.
Signed-off-by: Alyssa Rosenzweig <alyssa at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=9b3b1561fd0ae44ddabda347562e8d71181cb566
Author: Alyssa Rosenzweig <alyssa at collabora.com>
Date: Wed Jun 9 16:42:54 2021 -0400
panfrost: Add "Cache Flush" job XML
Likely useful for efficient memory_barrier and texture_barrier
operations.
Signed-off-by: Alyssa Rosenzweig <alyssa at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=cee3181ceb37963526d88ee21dca66d9cf1451f2
Author: Alyssa Rosenzweig <alyssa at collabora.com>
Date: Thu Jun 10 13:16:44 2021 -0400
panfrost: Set vertex job_barrier
Fixes KHR-GLES31.core.vertex_attrib_binding.advanced-iterations which
pingpongs XFB/attributes
Signed-off-by: Alyssa Rosenzweig <alyssa at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=3b9f1f39d166acb70ea5d516ad973b31e471bd34
Author: Alyssa Rosenzweig <alyssa at collabora.com>
Date: Tue Jun 8 11:33:52 2021 -0400
panfrost: Flush before compute jobs
Suboptimal but fixes KHR-GLES31.core.compute_shader.pipeline-post-xfb,
which is stubbornly still broken with memory barriers implemented and
cache flush jobs inserted. More investigation needed but probably not
right now.
Signed-off-by: Alyssa Rosenzweig <alyssa at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=293ea1959c17771f01b14532398ef59f36df0049
Author: Alyssa Rosenzweig <alyssa at collabora.com>
Date: Mon Jun 7 18:36:07 2021 -0400
panfrost: Flush everything for glMemoryBarrier
This is inefficient but so far I see the DDK doing the same thing. Fixes
KHR-GLES31.core.shader_storage_buffer_object.advanced-usage-sync-vsfs
In the future we should look into cache flush jobs.
Signed-off-by: Alyssa Rosenzweig <alyssa at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=29012d96b85afdc460ad465b47afc4e74f9baba8
Author: Alyssa Rosenzweig <alyssa at collabora.com>
Date: Wed Jun 9 15:28:08 2021 -0400
panfrost: Clean up vertex/instance ID on Midgard
Use the proper XML.
Signed-off-by: Alyssa Rosenzweig <alyssa at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=f58e08fbab2e31851ae971f7466fc6dfbdcca47b
Author: Alyssa Rosenzweig <alyssa at collabora.com>
Date: Wed Jun 9 15:26:05 2021 -0400
panfrost: Add XML for vertex/instance ID records
Signed-off-by: Alyssa Rosenzweig <alyssa at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=851587f2813a839224947136eb74e95303d78813
Author: Alyssa Rosenzweig <alyssa at collabora.com>
Date: Wed Jun 9 13:42:26 2021 -0400
panfrost: Set valid_buffer_range for GPU writes
Transform feedback, SSBO writes, and image writes in particular can
affect this and have bad interactions. Fixes
KHR-GLES31.core.shader_atomic_counters.basic-usage-vs
Signed-off-by: Alyssa Rosenzweig <alyssa at collabora.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=a9a8d74d1f6a7590f7f3434c123a07b08b4c9b79
Author: Alyssa Rosenzweig <alyssa at collabora.com>
Date: Tue Jun 8 20:42:03 2021 -0400
panfrost: Remove pan_image_state
Instead just group the fields about validity into a simpler structure in
panfrost_resource. Panvk can do the same. Common code shouldn't be
thinking in terms of this 'larger' structure anyway.
Signed-off-by: Alyssa Rosenzweig <alyssa at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=6f0e1c27d94c434998fb61f3fe29caab1cfce7e2
Author: Alyssa Rosenzweig <alyssa at collabora.com>
Date: Tue Jun 8 20:32:43 2021 -0400
panfrost: Make data_valid a bitset
More compact and will allow simpler code.
Signed-off-by: Alyssa Rosenzweig <alyssa at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=77aff510907624e1972d77e5d4c60089813d961e
Author: Alyssa Rosenzweig <alyssa at collabora.com>
Date: Wed Jun 9 13:09:44 2021 -0400
panfrost: Don't clobber indirect dispatch fields
These should be kept as zero so they can be packed correctly. Fixes a
number of KHR-GLES31 fails.
Signed-off-by: Alyssa Rosenzweig <alyssa at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=fd7b44882ce3c7604be592f484264097125dfa52
Author: Alyssa Rosenzweig <alyssa at collabora.com>
Date: Tue Jun 8 11:20:42 2021 -0400
panfrost: Use direct dispatch with shared memory
This would require memory allocations we don't handle.
Signed-off-by: Alyssa Rosenzweig <alyssa at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=d4f25a958879242dc1268e49033146a6cdf6289d
Author: Alyssa Rosenzweig <alyssa at collabora.com>
Date: Wed Jun 9 12:36:54 2021 -0400
pan/indirect_dispatch: Use extracted values
Signed-off-by: Alyssa Rosenzweig <alyssa at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=fdfc8b980666c197c8a813012f23b1b9064c00f1
Author: Alyssa Rosenzweig <alyssa at collabora.com>
Date: Wed Jun 9 12:31:10 2021 -0400
pan/indirect_dispatch: Expand split expressions
Careful algebraic transforms makes these much simpler.
Signed-off-by: Alyssa Rosenzweig <alyssa at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=989caacc325dbc213f201b82e2ad678362632ccc
Author: Alyssa Rosenzweig <alyssa at collabora.com>
Date: Wed Jun 9 12:08:19 2021 -0400
pan/indirect_dispatch: Distinguish minus-1 defs
This makes the logic clearer and allows the original values to be
accessed.
Signed-off-by: Alyssa Rosenzweig <alyssa at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=a90345d4c80ea5b7f78dd4e2f03513069751e731
Author: Alyssa Rosenzweig <alyssa at collabora.com>
Date: Wed Jun 9 12:00:20 2021 -0400
pan/indirect_dispatch: Simplify empty command case
Job type is alone with bitsize in the bottom byte of the addressed
worse, so if we use an 8-bit store we avoid the RMW complexity.
Signed-off-by: Alyssa Rosenzweig <alyssa at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=52991aad7f16a09f09952a1f670fd42528c2e6fe
Author: Alyssa Rosenzweig <alyssa at collabora.com>
Date: Wed Jun 9 11:50:37 2021 -0400
pan/indirect_dispatch: Indent NIR blocks
Easier to visualize the control flow this way.
Signed-off-by: Alyssa Rosenzweig <alyssa at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=f652c61283b7c36ef20c3be72730ace70f15649e
Author: Alyssa Rosenzweig <alyssa at collabora.com>
Date: Tue Jun 8 20:27:52 2021 -0400
panfrost: Reduce pan_image_state indirection
In actuality, this just shadows the crc_valid for pan_cs... the
data_valid checks are contained in the caller and just add noise.
Signed-off-by: Alyssa Rosenzweig <alyssa at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=d181218238e893141bfc058c47f946cb18c5f016
Author: Alyssa Rosenzweig <alyssa at collabora.com>
Date: Tue Jun 8 20:17:23 2021 -0400
panfrost: Don't CRC mipmapped textures
CRC is intended for final render targets and especially for UI, not the
kind of things you'd mipmap. Meanwhile CRC only works for a single
level, meaning at any given point, half the CRC buffer would be wasted
for a full miptree.
"Arm Mali Best Practices Guide" tells developers that the DDK only
enables CRC for non-mipmapped resources (at least the Vulkan DDK), so
let's do the same, save some memory, and simplify our code.
Signed-off-by: Alyssa Rosenzweig <alyssa at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=eb82863f8ad160ed315b533a2bce7008bc43f2af
Author: Alyssa Rosenzweig <alyssa at collabora.com>
Date: Mon Jun 7 18:28:36 2021 -0400
panfrost: Drop todo on PIPE_COMPUTE_CAP_IMAGES_SUPPORTED
They work fine.
Signed-off-by: Alyssa Rosenzweig <alyssa at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=b919ad7d97e18e2f9f4ad6bcdce6ac05eb2da828
Author: Alyssa Rosenzweig <alyssa at collabora.com>
Date: Wed Jun 9 09:21:22 2021 -0400
panfrost: Set PIPE_COMPUTE_CAP_MAX_THREADS_PER_BLOCK
Fixes KHR-GLES31.core.gpu_shader5.images_array_indexing
Signed-off-by: Alyssa Rosenzweig <alyssa at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=a3b4d2241e5e1d209cabec56f3510c008a9be954
Author: Alyssa Rosenzweig <alyssa at collabora.com>
Date: Mon Jun 7 18:28:16 2021 -0400
panfrost: Set PIPE_COMPUTE_CAP_SUBGROUP_SIZE
Signed-off-by: Alyssa Rosenzweig <alyssa at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=05755d858bc42a40af05dc60a5913785933ee93f
Author: Alyssa Rosenzweig <alyssa at collabora.com>
Date: Mon Jun 7 17:40:17 2021 -0400
panfrost: Lower max compute size
Match the DDK's limit (Mali G52), I think there's undocumented errata
here. Fixes
KHR-GLES31.core.texture_buffer.texture_buffer_operations_image_store
Signed-off-by: Alyssa Rosenzweig <alyssa at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=c9a0045705352a4f0d293a6c3c71e104f39a2263
Author: Alyssa Rosenzweig <alyssa at collabora.com>
Date: Mon Jun 7 18:47:49 2021 -0400
panfrost: Make image buffers robust
Signed-off-by: Alyssa Rosenzweig <alyssa at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=f30aab400463d186e9cabb59fddbb5896e316a0a
Author: Alyssa Rosenzweig <alyssa at collabora.com>
Date: Mon Jun 7 17:01:59 2021 -0400
panfrost: Fix BUFFER image handling
Fixes:
KHR-GLES31.core.shader_image_load_store.advanced-allMips-cs
KHR-GLES31.core.shader_image_load_store.advanced-allMips-fs
Signed-off-by: Alyssa Rosenzweig <alyssa at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=7e25b20d3f6a98e4314a6a071e090212188fb398
Author: Alyssa Rosenzweig <alyssa at collabora.com>
Date: Mon Jun 7 15:25:49 2021 -0400
panfrost: Allocate XFB buffers per-instance
Somehow XFB gets so little use we never noticed. Fixes:
KHR-GLES31.core.vertex_attrib_binding.basic-input-case9
KHR-GLES31.core.vertex_attrib_binding.basic-input-case11
KHR-GLES31.core.vertex_attrib_binding.basic-inputI-case2
Signed-off-by: Alyssa Rosenzweig <alyssa at collabora.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=9985c5bb88ff97180eb03cb7fa3e0528209920c3
Author: Alyssa Rosenzweig <alyssa at collabora.com>
Date: Mon Jun 7 14:08:42 2021 -0400
panfrost: Don't set a blend shader for no_colour
It's pointless and confuses the hardware. Fixes (on Bifrost)
KHR-GLES31.core.draw_buffers_indexed.color_masks
Yes, this is a silly edge case. Yes, we still have to handle it
correctly.
Signed-off-by: Alyssa Rosenzweig <alyssa at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=8d687cb65eabb2ebadb09be6f8e47496af22ec6f
Author: Alyssa Rosenzweig <alyssa at collabora.com>
Date: Mon Jun 7 13:38:45 2021 -0400
panfrost: Remove scissor_culls_everything
Based on a misunderstanding of how the scissor test works, and in
particular breaks transform feedback and SSBO writes from vertex
shaders.
Replace it with a moral equivalent to rasterizer_discard so vertex
shaders still run.
Signed-off-by: Alyssa Rosenzweig <alyssa at collabora.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=0186367dc75bde46d495e3e1d3de1a96c889262b
Author: Alyssa Rosenzweig <alyssa at collabora.com>
Date: Fri Jun 4 20:23:33 2021 -0400
panfrost: Add some missing BGRA formats
Fixes:
KHR-GLES3.copy_tex_image_conversions.forbidden.*
KHR-GLES3.packed_pixels.pbo_rectangle.rgb5_a1
KHR-GLES3.packed_pixels.pbo_rectangle.rgba
KHR-GLES3.packed_pixels.pbo_rectangle.rgba4
KHR-GLES3.packed_pixels.pbo_rectangle.rgba8
KHR-GLES3.packed_pixels.rectangle.rgb5_a1
KHR-GLES3.packed_pixels.rectangle.rgba
KHR-GLES3.packed_pixels.rectangle.rgba4
KHR-GLES3.packed_pixels.rectangle.rgba8
KHR-GLES3.packed_pixels.varied_rectangle.rgb5_a1
KHR-GLES3.packed_pixels.varied_rectangle.rgba
KHR-GLES3.packed_pixels.varied_rectangle.rgba4
KHR-GLES3.packed_pixels.varied_rectangle.rgba8
Signed-off-by: Alyssa Rosenzweig <alyssa at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=d7788252e69695e64a2207ae1b097c390f2ee35a
Author: Alyssa Rosenzweig <alyssa at collabora.com>
Date: Fri Jun 4 19:18:23 2021 -0400
panfrost: Emulate indirect draws on Midgard
I can't really justify spending time on this right now, even to myself.
So take the perf hit and get out checkbox.
Signed-off-by: Alyssa Rosenzweig <alyssa at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=bc48df001c0d89c63896fd758c2f77f4deb173c4
Author: Alyssa Rosenzweig <alyssa at collabora.com>
Date: Fri Jun 4 19:06:36 2021 -0400
panfrost: Fix dirty state emission
If we have per-draw state (vertex ID stuff), there's an ordering
mismatch. Fixes
dEQP-GLES31.functional.draw_base_vertex.draw_elements_instanced_base_vertex.builtin_variable.vertex_id
on Midgard, and I'm not sure why it was passing on Bifrost before. Also
should fix (on both architectures) DRAWID issues.
Signed-off-by: Alyssa Rosenzweig <alyssa at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=43cff98dfff18c11cb6d94da516f7683085c1c54
Author: Alyssa Rosenzweig <alyssa at collabora.com>
Date: Wed Jun 9 13:19:41 2021 -0400
pan/mdg: Insert moves to load/store registers
Ensures a valid schedule/regalloc is possible when vectors are used in
funny ways, as occurs in dEQP-GLES31 resulting in a scheduler hang (or
with prior patches, an RA failure).
Signed-off-by: Alyssa Rosenzweig <alyssa at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=5f37474403a46db1ab3b11bc486ee39058afd33f
Author: Alyssa Rosenzweig <alyssa at collabora.com>
Date: Wed Jun 9 13:18:13 2021 -0400
pan/mdg: Assert scheduled instructions are reasonable
Would've got a scheduler hang.
Signed-off-by: Alyssa Rosenzweig <alyssa at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=fa200378950a4c38410784bd90daae715431f8f5
Author: Alyssa Rosenzweig <alyssa at collabora.com>
Date: Wed Jun 9 13:17:39 2021 -0400
pan/mdg: Don't skip unit-based checks in choose_instruction
If an explicit unit isn't specified, we still should check.
Signed-off-by: Alyssa Rosenzweig <alyssa at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=edbdf4f4e7b9e356adbc2a05f15e00dceb5a56f6
Author: Alyssa Rosenzweig <alyssa at collabora.com>
Date: Wed Jun 9 13:17:04 2021 -0400
pan/mdg: Use more accurate ld/st reg estimates
And assert that we got them right.
Signed-off-by: Alyssa Rosenzweig <alyssa at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=68846ba4a8caf881649fd79e80b379b421aca1ca
Author: Alyssa Rosenzweig <alyssa at collabora.com>
Date: Fri Jun 4 19:07:41 2021 -0400
pan/mdg: Lower away gl_VertexID offset
Technically we can stick the offset in the vertex ID attribute record,
but this is a faster way to get the test passing and Midgard perf?
what's that?
Signed-off-by: Alyssa Rosenzweig <alyssa at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=26baad41f15504194c1004a47bad65765213c220
Author: Alyssa Rosenzweig <alyssa at collabora.com>
Date: Fri Jun 4 18:57:28 2021 -0400
pan/mdg: Wire in PAN_SYSVAL_VERTEX_INSTANCE_OFFSETS
If we're going to advertise the CAP, better not crash..
Signed-off-by: Alyssa Rosenzweig <alyssa at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=8066131158552514a117a360d5515f276b5e275c
Author: Alyssa Rosenzweig <alyssa at collabora.com>
Date: Fri Jun 4 18:36:43 2021 -0400
panfrost: Don't allocate WLS when not needed
Signed-off-by: Alyssa Rosenzweig <alyssa at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=5dd6030876cc3ac1cf49f9af40f4ab4ba29a4737
Author: Alyssa Rosenzweig <alyssa at collabora.com>
Date: Fri Jun 4 17:36:26 2021 -0400
panfrost: Mark 16/32_UNORM as non-renderable (v5)
You'd just get a blend shader anyway, and since they're not spec
requirements, let's not worry about backporting the Midgard lowerings.
Takes dEQP-GLES31.functional.fbo.color.tex2d.* on Midgard from crashing
to not supported.
Signed-off-by: Alyssa Rosenzweig <alyssa at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=6936298d75c5c6f7f7e4d5a7e04bbf8c09db889a
Author: Alyssa Rosenzweig <alyssa at collabora.com>
Date: Fri Jun 4 17:17:28 2021 -0400
pan/mdg: Fix incorrect rewrite in Midgard scheduler
Fixes on Midgard
dEQP-GLES31.functional.shaders.builtin_functions.uniform.findLSBMinusOne.highp_fragment
Signed-off-by: Alyssa Rosenzweig <alyssa at collabora.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=def3d52a159497fa3a0e6ac5a2537bfbf1604b8c
Author: Alyssa Rosenzweig <alyssa at collabora.com>
Date: Fri Jun 4 17:04:43 2021 -0400
pan/mdg: Update r1.w comment
Signed-off-by: Alyssa Rosenzweig <alyssa at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=1369d5e43ac309e4ac63af0ec349c496eaf757ee
Author: Alyssa Rosenzweig <alyssa at collabora.com>
Date: Fri Jun 4 15:26:30 2021 -0400
pan/mdg: Handle {i,u}{add,sub}_sat
As SATADD with different modifiers.
Signed-off-by: Alyssa Rosenzweig <alyssa at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=bdb32eec9aa1d28e15f26227ce71e6e4fef55c7e
Author: Alyssa Rosenzweig <alyssa at collabora.com>
Date: Fri Jun 4 15:24:44 2021 -0400
pan/mdg: Fix units for SUBSAT
Signed-off-by: Alyssa Rosenzweig <alyssa at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=07856d155b2028f43c6addf1ac71b087dc0fac60
Author: Alyssa Rosenzweig <alyssa at collabora.com>
Date: Fri Jun 4 14:55:14 2021 -0400
panfrost: Respect early-Z force on Midgard
Fixes dEQP-GLES31.functional.image_load_store.early_fragment_tests.* on
Midgard.
Signed-off-by: Alyssa Rosenzweig <alyssa at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=0d4368b22aafef305bd85e2f4ba035b05d2c4479
Author: Alyssa Rosenzweig <alyssa at collabora.com>
Date: Fri Jun 4 14:50:53 2021 -0400
panfrost: Don't force early-z with occlusion query
..even if there is no z/s enabled. Fixes
dEQP-GLES31.functional.fbo.no_attachments.* on Midgard.
Signed-off-by: Alyssa Rosenzweig <alyssa at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=e4592d5651d297f9df2da7a2da47db2087dc627b
Author: Alyssa Rosenzweig <alyssa at collabora.com>
Date: Fri Jun 4 14:43:10 2021 -0400
panfrost: Simplify Midgard blend disable
Probably a bit faster too.
Signed-off-by: Alyssa Rosenzweig <alyssa at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=2af0c02ffa0e3e6f03bc631fcc1a1260b84a9547
Author: Alyssa Rosenzweig <alyssa at collabora.com>
Date: Fri Jun 4 14:42:56 2021 -0400
panfrost: Clarify how fs_sidefx works with oq
Signed-off-by: Alyssa Rosenzweig <alyssa at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=22a973601b956ed12a3a009b796e31751844f91f
Author: Alyssa Rosenzweig <alyssa at collabora.com>
Date: Fri Jun 4 13:38:02 2021 -0400
pan/mdg: Stub memory_barrier{_image}
Same as we do for Bifrost.
Signed-off-by: Alyssa Rosenzweig <alyssa at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=21d06a41f7f99918ee0024abc708424831b7e5f4
Author: Alyssa Rosenzweig <alyssa at collabora.com>
Date: Fri Jun 4 12:50:46 2021 -0400
pan/mdg: Make -Wswitch happy
Signed-off-by: Alyssa Rosenzweig <alyssa at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=34c6d105f60443beabd5255fc0173956a071fc27
Author: Alyssa Rosenzweig <alyssa at collabora.com>
Date: Fri Jun 4 12:04:50 2021 -0400
pan/mdg: Use consistent casing in midgard_print
Signed-off-by: Alyssa Rosenzweig <alyssa at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=c88c5b1218d20a4d5087e78eace7154571cc0dbd
Author: Alyssa Rosenzweig <alyssa at collabora.com>
Date: Thu Jun 3 15:15:01 2021 -0400
panfrost: Assert alignment of indirect records
Continuation records need alignment, this shows they already have it.
Signed-off-by: Alyssa Rosenzweig <alyssa at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=4b52b0841f363fb6c4151f7f5818e181561d1147
Author: Alyssa Rosenzweig <alyssa at collabora.com>
Date: Thu Jun 3 15:14:00 2021 -0400
panfrost: Make instancing code more obvious
Signed-off-by: Alyssa Rosenzweig <alyssa at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=552fdc7ea43c74e046767f4e3909fbd5c0eaf1b6
Author: Alyssa Rosenzweig <alyssa at collabora.com>
Date: Thu Jun 3 15:09:06 2021 -0400
panfrost: Fix src_offset data type
We treat it as signed but had it marked as unsigned. It can be negative
in obscure cases.
Signed-off-by: Alyssa Rosenzweig <alyssa at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=afc4ebdcc0c8058533168446e31cac57e6038f72
Author: Alyssa Rosenzweig <alyssa at collabora.com>
Date: Thu Jun 3 15:06:05 2021 -0400
panfrost: Align NPOT divisor records
Signed-off-by: Alyssa Rosenzweig <alyssa at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=1760511e02607361100e605a7b10fffbaccb155b
Author: Alyssa Rosenzweig <alyssa at collabora.com>
Date: Thu Jun 3 14:09:18 2021 -0400
panfrost: Add util_draw_indirect() debug path
Useful for finding problems with the GPU indirect path.
Signed-off-by: Alyssa Rosenzweig <alyssa at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=d61162af50bcdb5035de0fb75e3f1cfff706551c
Author: Alyssa Rosenzweig <alyssa at collabora.com>
Date: Thu Jun 3 11:07:45 2021 -0400
panfrost: Zero r_dimension for buffer textures
Instead of reading wrong side of the union (undefined behaviour). Fixes
a GenXML assertion failure in
KHR-GLES31.core.texture_buffer.texture_buffer_texture_buffer_range
Signed-off-by: Alyssa Rosenzweig <alyssa at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=a78487f795e81c8fc27c2d1054f58dd35eda8c3a
Author: Alyssa Rosenzweig <alyssa at collabora.com>
Date: Wed Jun 2 17:08:53 2021 -0400
panfrost: Fix crc_valid condition
Fixes fails in dEQP-GLES31.functional.texture.border_clamp.* when run in
parallel with certain other tests.
Signed-off-by: Alyssa Rosenzweig <alyssa at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=729b8c55f43dfb81de30c0db69f6a251a0f5250a
Author: Alyssa Rosenzweig <alyssa at collabora.com>
Date: Wed Jun 2 17:07:10 2021 -0400
panfrost: Simplify compute_checksum_size formula
Signed-off-by: Alyssa Rosenzweig <alyssa at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=3525ad7c4531fc68d91e0cf08cda979fc747f850
Author: Alyssa Rosenzweig <alyssa at collabora.com>
Date: Wed Jun 2 15:45:51 2021 -0400
panfrost: Fix vertex image attribute overrun
Images take a continuation record, don't scribble zeroes over.
Signed-off-by: Alyssa Rosenzweig <alyssa at collabora.com>
Fixes: dc85f65e059 ("panfrost: emit shader image attribute descriptors")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=a5ec1e7f75b841c514ee1a8ed5796744a65714c3
Author: Alyssa Rosenzweig <alyssa at collabora.com>
Date: Wed Jun 2 14:52:56 2021 -0400
pan/bi: Force u32 for flat varyings
Since the GLSL compilers will pack together flat varyings with no regard
to type, under the assumption the backend can deal with it. I guess we
can deal with it then... Fixes fails in
dEQP-GLES31.functional.separate_shader.random.*
Signed-off-by: Alyssa Rosenzweig <alyssa at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=b9127ecbb1228e05c6a390ae83371c522b47eb8f
Author: Alyssa Rosenzweig <alyssa at collabora.com>
Date: Wed Jun 2 16:15:17 2021 -0400
panfrost: Use varying format from frag shader
Needed to fix up flat varyings to u32 due to TGSI brokenness. If we wack
TGSI, we can drop this.
Signed-off-by: Alyssa Rosenzweig <alyssa at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=58cbf10cdb1cc8b591ffd5931c0a014d52d67889
Author: Alyssa Rosenzweig <alyssa at collabora.com>
Date: Wed Jun 2 14:52:36 2021 -0400
panfrost: Correctly size varyings
The same slot could be specified multiple times with different
location_frac out of order, so we use two passes.
Signed-off-by: Alyssa Rosenzweig <alyssa at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=16e665713261748ac8ab6ffde3e22c2627326cd1
Author: Alyssa Rosenzweig <alyssa at collabora.com>
Date: Tue Jun 1 19:47:03 2021 -0400
pan/indirect_draw: Fix 1 instance, nonzero divisor
Instead of doing a complicated hack with the POT divisor, just zero the
stride of the linear attribute buffer like we do on the CPU.
Signed-off-by: Alyssa Rosenzweig <alyssa at collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=14da45259838abe3fd4fbd2df07f5681cc72612c
Author: Alyssa Rosenzweig <alyssa at collabora.com>
Date: Tue Jun 1 19:35:46 2021 -0400
pan/indirect_draw: Use unsigned comparisons
Instead of signed -- get the types right.
Signed-off-by: Alyssa Rosenzweig <alyssa at collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=5ea73dbed93585e16e0f3af0b9a079d6e12cefaf
Author: Alyssa Rosenzweig <alyssa at collabora.com>
Date: Tue Jun 1 19:32:43 2021 -0400
pan/indirect: Factor out is_power_of_two_or_zero
The function is complicated enough as it is -- hide the bit twiddling
behind a helper function.
Signed-off-by: Alyssa Rosenzweig <alyssa at collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=c25a40d53511cd85f17516c16f958a59b8e38509
Author: Alyssa Rosenzweig <alyssa at collabora.com>
Date: Tue Jun 1 19:42:54 2021 -0400
panfrost: Default indirect attributes to 1D type
Avoids some complexity in the indirect draw happy path.
Signed-off-by: Alyssa Rosenzweig <alyssa at collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=0566fa2db46ac1d9ca8055cb9bff41ef452ac83d
Author: Alyssa Rosenzweig <alyssa at collabora.com>
Date: Tue Jun 1 19:14:06 2021 -0400
panfrost: Use util_last_bit for images
Probbaly more correct for hols in image_mask.
Signed-off-by: Alyssa Rosenzweig <alyssa at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=619b1bc23b05f5be64bc3bc9fb3fe0d281c2c26c
Author: Alyssa Rosenzweig <alyssa at collabora.com>
Date: Tue Jun 1 19:09:00 2021 -0400
panfrost: Be explicit in image modifier handling
Signed-off-by: Alyssa Rosenzweig <alyssa at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=5ed37ebfeebc15cc4b124d70fc8221b25102a88e
Author: Alyssa Rosenzweig <alyssa at collabora.com>
Date: Thu May 20 09:40:43 2021 -0400
panfrost: Separate image attribute and buffer emit
Trying to disentangle attributes and attribute buffers, so here's
a leaf node for that change.
Signed-off-by: Alyssa Rosenzweig <alyssa at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=f14dbc02fbb65f25b1a3a7cddfcf2af4f57bf2de
Author: Alyssa Rosenzweig <alyssa at collabora.com>
Date: Wed May 19 18:34:25 2021 -0400
panfrost: Don't duplicate attribute buffers
If the (vbi, divisor) tuple matches, we can save an attribute buffer
descriptor. We do the linking at CSO create time. This should be a bit
more cache friendly.
Signed-off-by: Alyssa Rosenzweig <alyssa at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=61b83fba276be794a2e182d99d3e46c4ea9bc7c6
Author: Alyssa Rosenzweig <alyssa at collabora.com>
Date: Thu Jun 3 17:38:35 2021 -0400
panfrost: Disable AFBC on v7
Broken in several ways. Hide it until we can get this sorted, and have a
test plan to keep it sorted.
Signed-off-by: Alyssa Rosenzweig <alyssa at collabora.com>
Cc: mesa-stable
Acked-by: Boris Brezillon <boris.brezillon at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=655983d32856b0b894d4d5a2ebcd89ad5b58991b
Author: Alyssa Rosenzweig <alyssa at collabora.com>
Date: Tue Jun 1 17:51:05 2021 -0400
panfrost: Add missing 'Reverse issue order flag'
Should fix an issue I'm seeing. Spoiler alert, it does not.
Signed-off-by: Alyssa Rosenzweig <alyssa at collabora.com>
Acked-by: Boris Brezillon <boris.brezillon at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=317dd5b3272cac2f54583aa0fc84790d030b4649
Author: Alyssa Rosenzweig <alyssa at collabora.com>
Date: Tue Jun 1 15:47:20 2021 -0400
panfrost: Remove AFBC format fixups
It's too complicated and probably for no actual benefit. The main reason
we have BGR formats is for display, but that's export and doesn't get
hit by this path. Internal BGRA textures are possible with a Mesa
extension but sufficiently rare that I regret suggesting this as a
possible optimization. My apologies, and thanks for the fish.
Signed-off-by: Alyssa Rosenzweig <alyssa at collabora.com>
Acked-by: Boris Brezillon <boris.brezillon at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=e111464bfce47b7bbfe872a196027fa3248620b7
Author: Alyssa Rosenzweig <alyssa at collabora.com>
Date: Tue Jun 8 16:04:05 2021 -0400
pan/bi: Don't allocate past the end of the reg file
Signed-off-by: Alyssa Rosenzweig <alyssa at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=47e0cce820fb94d7e07253df30d5389d8fb4e3f9
Author: Alyssa Rosenzweig <alyssa at collabora.com>
Date: Tue Jun 8 14:49:04 2021 -0400
pan/bi: Track words instead of bytes in RA
Reduces RA memory footprint by 4x, fixing an OOM in the following dEQP
test that otherwise would allocate 8GB of memory...
dEQP-GLES31.functional.ssbo.layout.random.all_shared_buffer.36
Signed-off-by: Alyssa Rosenzweig <alyssa at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=dbc346d6593dc514c41aee5807105ee6f36f7c02
Author: Alyssa Rosenzweig <alyssa at collabora.com>
Date: Tue Jun 8 14:35:52 2021 -0400
pan/bi: Simplify spill code
Now allow spilling all nodes. Fixes failed spilling in
dEQP-GLES31.functional.ssbo.layout.random.all_shared_buffer.21
Signed-off-by: Alyssa Rosenzweig <alyssa at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=6dbaae77d9b92f33ba7aab0ee633e154f8ee5a58
Author: Alyssa Rosenzweig <alyssa at collabora.com>
Date: Wed Jun 2 18:30:30 2021 -0400
pan/bi: Emit a dummy ATEST if needed
Match what the blob does, since Bifrost has so many random errata we'd
be fools not to.
Signed-off-by: Alyssa Rosenzweig <alyssa at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=b947ab8b108445e60f928d80ad59fe718703aca7
Author: Alyssa Rosenzweig <alyssa at collabora.com>
Date: Wed Jun 2 18:08:41 2021 -0400
pan/bi: Lower 64-bit ints again
Signed-off-by: Alyssa Rosenzweig <alyssa at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=95458c4033003489c487ac432568bf1866f4aaf8
Author: Alyssa Rosenzweig <alyssa at collabora.com>
Date: Wed Jun 2 10:46:57 2021 -0400
pan/bi: Lower stores with component != 0
If the shader packs multiple varyings into the same location with
different location_frac, we'll need to lower to a single varying store
that collects all of the channels together. This is not trivial during
code gen, but it is trivial to do in NIR right before codegen by relying
on nir_lower_io_to_temporaries. Since we're guaranteed all varyings will
be written exactly once, in the exit block, we can scan the shader
linearly and collect stores together in a single pass.
Signed-off-by: Alyssa Rosenzweig <alyssa at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=de42707101cdf2dbf3a1d9939e020d9c68f3d47b
Author: Alyssa Rosenzweig <alyssa at collabora.com>
Date: Tue Jun 1 20:24:31 2021 -0400
pan/bi: Lower loads with component > 0
We have no native way to swizzle out a nonzero component in a load, but
we can simply load extra components and do the swizzle in shader
instructions. This is inefficient, since it loads data to discard
immediately, but it's required for conformance in some edge cases.
Signed-off-by: Alyssa Rosenzweig <alyssa at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=5c0e5d4d2da4e40f453aa78f31253da55b4a1df7
Author: Alyssa Rosenzweig <alyssa at collabora.com>
Date: Tue Jun 1 18:50:30 2021 -0400
pan/bi: Handle images in vertex shaders
We need to offset by the number of attributes, since the primary
attribute table is shared for images and vertex attributes.
Signed-off-by: Alyssa Rosenzweig <alyssa at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=071165e08225a6859cf4e10dafdbe3377d85d81a
Author: Alyssa Rosenzweig <alyssa at collabora.com>
Date: Tue May 25 15:49:27 2021 -0400
pan/bi: Model +BLEND clobbering of r48
Signed-off-by: Alyssa Rosenzweig <alyssa at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=4663afd8ab2bd56f9be61c967d76560413d48d3b
Author: Alyssa Rosenzweig <alyssa at collabora.com>
Date: Tue May 25 13:56:41 2021 -0400
pan/bi: Don't restrict the register file in non-blend shaders
Now that preloading is handled correctly, there's nothing 'special'
about R59 and up, so this gets us a few more registers to work with.
Signed-off-by: Alyssa Rosenzweig <alyssa at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=35c7fefc8fad497d52cc5c23ef5a708158c932c8
Author: Alyssa Rosenzweig <alyssa at collabora.com>
Date: Tue May 25 13:52:56 2021 -0400
pan/bi: Allow move/sink in blend shaders
Now that we handle precolouring we don't need to workaround anything.
Signed-off-by: Alyssa Rosenzweig <alyssa at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=3d851f3b8e2cbc2f48aed689b646fc3076abc748
Author: Alyssa Rosenzweig <alyssa at collabora.com>
Date: Tue May 25 13:50:54 2021 -0400
pan/bi: Model interference with preloaded regs
Now that we have affinity masks in RA, we can handle this as an easy
case of register liveness analysis, rather than creating pseudo-nodes
and trying hard to coalesce the resulting moves.
Signed-off-by: Alyssa Rosenzweig <alyssa at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=8d4ce240be6c2df906dc52fc978de4bb5a2aeb77
Author: Alyssa Rosenzweig <alyssa at collabora.com>
Date: Tue May 25 13:50:13 2021 -0400
pan/bi: Explicit zero reg_live_{in, out} when needed
I want to use these fields for a similar purpose in the register
allocator, so they won't be zero anymore for scheduling.
Signed-off-by: Alyssa Rosenzweig <alyssa at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=98f072e21bcb029381c53c6005279f0be81a737e
Author: Alyssa Rosenzweig <alyssa at collabora.com>
Date: Tue May 25 12:22:55 2021 -0400
pan/bi: Inline spilling in RA
Should be faster for both spill and not spill cases.
Signed-off-by: Alyssa Rosenzweig <alyssa at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=80a58dc2e63617bcc8c0f18cb31320e51287333a
Author: Alyssa Rosenzweig <alyssa at collabora.com>
Date: Tue May 25 13:52:48 2021 -0400
pan/bi: Use explicit affinities in RA
Inline LCRA to allow us to make the change without disrupting Midgard,
and get some nice cleanup from doing so.
Signed-off-by: Alyssa Rosenzweig <alyssa at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=9d7e25a9a96f944905ea669fe4ddafa0d6a5f7bd
Author: Alyssa Rosenzweig <alyssa at collabora.com>
Date: Thu May 6 13:10:00 2021 -0400
pan/bi: Allow IADD.u32 on FMA as *IADDC
There's a common special case, slight boost in scheduler freedom.
total nops in shared programs: 101130 -> 101048 (-0.08%)
nops in affected programs: 1677 -> 1595 (-4.89%)
helped: 13
HURT: 0
helped stats (abs) min: 6 max: 8 x̄: 6.31 x̃: 6
helped stats (rel) min: 3.24% max: 25.00% x̄: 7.42% x̃: 4.48%
95% mean confidence interval for nops value: -6.76 -5.85
95% mean confidence interval for nops %-change: -12.02% -2.81%
Nops are helped.
total clauses in shared programs: 27076 -> 27075 (<.01%)
clauses in affected programs: 8 -> 7 (-12.50%)
helped: 1
HURT: 0
total quadwords in shared programs: 113142 -> 113113 (-0.03%)
quadwords in affected programs: 1935 -> 1906 (-1.50%)
helped: 13
HURT: 0
helped stats (abs) min: 2 max: 4 x̄: 2.23 x̃: 2
helped stats (rel) min: 0.95% max: 7.50% x̄: 2.16% x̃: 1.26%
95% mean confidence interval for quadwords value: -2.59 -1.87
95% mean confidence interval for quadwords %-change: -3.45% -0.88%
Quadwords are helped.
Signed-off-by: Alyssa Rosenzweig <alyssa at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=7aefd6c1ba2d9ca019bbb2ef283d12be97ca93ba
Author: Alyssa Rosenzweig <alyssa at rosenzweig.io>
Date: Thu May 6 11:11:09 2021 -0400
pan/bi: Track liveness while scheduling
If we know that a value is killed in the next tuple, there is no need to
write it out to the register file. We already handled this as a packing
fixup. However, avoiding this write also frees up an extra slot in the
register block, which offers additional scheduling freedom. To take
advantage of this, we extend liveness analysis to work while scheduling,
and modify the schedulable predicate accordingly.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=20809daa9a7065b21718f9d2aa29dbb7f3953d75
Author: Alyssa Rosenzweig <alyssa at collabora.com>
Date: Tue May 4 17:49:24 2021 -0400
pan/bi: Add post-RA optimizer
Delete coalesced moves. Now this is trivial! See e.g shaders/tesseract/118.shader_test
Signed-off-by: Alyssa Rosenzweig <alyssa at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=4ed000cf3faf64d7c5679ad2735dff38b831ae99
Author: Alyssa Rosenzweig <alyssa at collabora.com>
Date: Tue May 4 17:27:07 2021 -0400
pan/bi: Bundle after RA
Flag day change to swap the order of the "scheduler" with the register
allocator. This gives RA much more freedom without significantly
hndering bundling.
It also opens up the door to Adult-level Scheduling which would occur
prior to bundling.
Signed-off-by: Alyssa Rosenzweig <alyssa at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=afa4a1d49654122bb1d85a7133387e241380307f
Author: Alyssa Rosenzweig <alyssa at rosenzweig.io>
Date: Wed May 5 14:06:26 2021 -0400
pan/bi: Fix bi_rewrite_passthrough ordering
The ordering is irrelevant for SSA form input, but is very relevant for
register input.
Signed-off-by: Alyssa Rosenzweig <alyssa at rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=246beb15cf78debf4beb725e236a4f572df60a22
Author: Alyssa Rosenzweig <alyssa at rosenzweig.io>
Date: Wed May 5 15:48:35 2021 -0400
pan/bi: Simplify TEXC codegen for sr_count=0
Obscure case.
Signed-off-by: Alyssa Rosenzweig <alyssa at rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=de8fe8c0b1179a4bc783878c1d5a37b7f1a44661
Author: Alyssa Rosenzweig <alyssa at collabora.com>
Date: Tue May 4 17:42:13 2021 -0400
pan/bi: Use TEXS_2D for rect textures
Signed-off-by: Alyssa Rosenzweig <alyssa at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=6f51bd99f2fa32d60e4ce7c94f8b5db32de43bbc
Author: Alyssa Rosenzweig <alyssa at collabora.com>
Date: Tue May 4 17:20:45 2021 -0400
pan/bi: Pull out bi_count_write_registers
Signed-off-by: Alyssa Rosenzweig <alyssa at collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11123>
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