Mesa (master): turnip: Use threadsize calculated by ir3

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Module: Mesa
Branch: master
Commit: 7ecc70b31cb457f8399c688a4911e98d88c633b2
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=7ecc70b31cb457f8399c688a4911e98d88c633b2

Author: Connor Abbott <cwabbott0 at gmail.com>
Date:   Wed Mar 10 13:26:58 2021 +0100

turnip: Use threadsize calculated by ir3

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9498>

---

 src/freedreno/vulkan/tu_pipeline.c | 12 ++++++++----
 1 file changed, 8 insertions(+), 4 deletions(-)

diff --git a/src/freedreno/vulkan/tu_pipeline.c b/src/freedreno/vulkan/tu_pipeline.c
index 40ed460fa8f..52b9e87e0fd 100644
--- a/src/freedreno/vulkan/tu_pipeline.c
+++ b/src/freedreno/vulkan/tu_pipeline.c
@@ -391,6 +391,8 @@ tu6_emit_xs_config(struct tu_cs *cs,
       return;
    }
 
+   enum a6xx_threadsize thrsz =
+      xs->info.double_threadsize ? THREAD128 : THREAD64;
    switch (stage) {
    case MESA_SHADER_VERTEX:
       tu_cs_emit_regs(cs, A6XX_SP_VS_CTRL_REG0(
@@ -428,7 +430,7 @@ tu6_emit_xs_config(struct tu_cs *cs,
                .halfregfootprint = xs->info.max_half_reg + 1,
                .branchstack = xs->branchstack,
                .mergedregs = xs->mergedregs,
-               .threadsize = THREAD128,
+               .threadsize = thrsz,
                .pixlodenable = xs->need_pixlod,
                .diff_fine = xs->need_fine_derivatives,
                .varying = xs->total_in != 0,
@@ -442,7 +444,7 @@ tu6_emit_xs_config(struct tu_cs *cs,
                .halfregfootprint = xs->info.max_half_reg + 1,
                .branchstack = xs->branchstack,
                .mergedregs = xs->mergedregs,
-               .threadsize = THREAD128,
+               .threadsize = thrsz,
       ));
       break;
    default:
@@ -577,6 +579,7 @@ tu6_emit_cs_config(struct tu_cs *cs, const struct tu_shader *shader,
    uint32_t work_group_id =
       ir3_find_sysval_regid(v, SYSTEM_VALUE_WORK_GROUP_ID);
 
+   enum a6xx_threadsize thrsz = v->info.double_threadsize ? THREAD128 : THREAD64;
    tu_cs_emit_pkt4(cs, REG_A6XX_HLSQ_CS_CNTL_0, 2);
    tu_cs_emit(cs,
               A6XX_HLSQ_CS_CNTL_0_WGIDCONSTID(work_group_id) |
@@ -584,7 +587,7 @@ tu6_emit_cs_config(struct tu_cs *cs, const struct tu_shader *shader,
               A6XX_HLSQ_CS_CNTL_0_WGOFFSETCONSTID(regid(63, 0)) |
               A6XX_HLSQ_CS_CNTL_0_LOCALIDREGID(local_invocation_id));
    tu_cs_emit(cs, A6XX_HLSQ_CS_CNTL_1_LINEARLOCALIDREGID(regid(63, 0)) |
-                  A6XX_HLSQ_CS_CNTL_1_THREADSIZE(THREAD128));
+                  A6XX_HLSQ_CS_CNTL_1_THREADSIZE(thrsz));
 }
 
 static void
@@ -1306,8 +1309,9 @@ tu6_emit_fs_inputs(struct tu_cs *cs, const struct ir3_shader_variant *fs)
                   A6XX_HLSQ_CONTROL_4_REG_IJ_LINEAR_SAMPLE(ij_regid[IJ_LINEAR_SAMPLE]));
    tu_cs_emit(cs, 0xfc);
 
+   enum a6xx_threadsize thrsz = fs->info.double_threadsize ? THREAD128 : THREAD64;
    tu_cs_emit_pkt4(cs, REG_A6XX_HLSQ_FS_CNTL_0, 1);
-   tu_cs_emit(cs, A6XX_HLSQ_FS_CNTL_0_THREADSIZE(THREAD128) |
+   tu_cs_emit(cs, A6XX_HLSQ_FS_CNTL_0_THREADSIZE(thrsz) |
                   COND(enable_varyings, A6XX_HLSQ_FS_CNTL_0_VARYINGS));
 
    bool need_size = fs->frag_face || fs->fragcoord_compmask != 0;