Mesa (main): nir: add _amd suffix to fragment_mask_fetch and fragment_fetch texops

GitLab Mirror gitlab-mirror at kemper.freedesktop.org
Thu Oct 7 17:52:54 UTC 2021


Module: Mesa
Branch: main
Commit: 225fe37c145cb7e3b1eee6aa7bc72351717572a0
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=225fe37c145cb7e3b1eee6aa7bc72351717572a0

Author: Rhys Perry <pendingchaos02 at gmail.com>
Date:   Thu Aug  5 16:19:51 2021 +0100

nir: add _amd suffix to fragment_mask_fetch and fragment_fetch texops

Signed-off-by: Rhys Perry <pendingchaos02 at gmail.com>
Reviewed-by: Jason Ekstrand <jason at jlekstrand.net>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12214>

---

 src/amd/compiler/aco_instruction_selection.cpp | 12 ++++++------
 src/amd/llvm/ac_nir_to_llvm.c                  | 16 ++++++++--------
 src/compiler/nir/nir.h                         |  6 +++---
 src/compiler/nir/nir_lower_input_attachments.c |  4 ++--
 src/compiler/nir/nir_print.c                   |  8 ++++----
 src/compiler/spirv/spirv_to_nir.c              |  8 ++++----
 6 files changed, 27 insertions(+), 27 deletions(-)

diff --git a/src/amd/compiler/aco_instruction_selection.cpp b/src/amd/compiler/aco_instruction_selection.cpp
index 534ee215da7..2f04619a7a3 100644
--- a/src/amd/compiler/aco_instruction_selection.cpp
+++ b/src/amd/compiler/aco_instruction_selection.cpp
@@ -9154,7 +9154,7 @@ tex_fetch_ptrs(isel_context* ctx, nir_tex_instr* instr, Temp* res_ptr, Temp* sam
                                   (aco_descriptor_type)(ACO_DESC_PLANE_0 + plane), instr, false);
    } else if (instr->sampler_dim == GLSL_SAMPLER_DIM_BUF) {
       *res_ptr = get_sampler_desc(ctx, texture_deref_instr, ACO_DESC_BUFFER, instr, false);
-   } else if (instr->op == nir_texop_fragment_mask_fetch) {
+   } else if (instr->op == nir_texop_fragment_mask_fetch_amd) {
       *res_ptr = get_sampler_desc(ctx, texture_deref_instr, ACO_DESC_FMASK, instr, false);
    } else {
       *res_ptr = get_sampler_desc(ctx, texture_deref_instr, ACO_DESC_IMAGE, instr, false);
@@ -9498,7 +9498,7 @@ visit_tex(isel_context* ctx, nir_tex_instr* instr)
         instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS ||
         instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS_MS) &&
        instr->is_array && instr->op != nir_texop_txf && instr->op != nir_texop_txf_ms &&
-       instr->op != nir_texop_fragment_fetch && instr->op != nir_texop_fragment_mask_fetch)
+       instr->op != nir_texop_fragment_fetch_amd && instr->op != nir_texop_fragment_mask_fetch_amd)
       coords[2] = bld.vop1(aco_opcode::v_rndne_f32, bld.def(v1), coords[2]);
 
    if (ctx->options->chip_class == GFX9 && instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
@@ -9517,8 +9517,8 @@ visit_tex(isel_context* ctx, nir_tex_instr* instr)
 
    else if ((instr->sampler_dim == GLSL_SAMPLER_DIM_MS ||
              instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS_MS) &&
-            instr->op != nir_texop_txs && instr->op != nir_texop_fragment_fetch &&
-            instr->op != nir_texop_fragment_mask_fetch) {
+            instr->op != nir_texop_txs && instr->op != nir_texop_fragment_fetch_amd &&
+            instr->op != nir_texop_fragment_mask_fetch_amd) {
       assert(has_sample_index);
       Operand op(sample_index);
       if (sample_index_cv)
@@ -9736,8 +9736,8 @@ visit_tex(isel_context* ctx, nir_tex_instr* instr)
       args.emplace_back(clamped_lod);
 
    if (instr->op == nir_texop_txf || instr->op == nir_texop_txf_ms ||
-       instr->op == nir_texop_samples_identical || instr->op == nir_texop_fragment_fetch ||
-       instr->op == nir_texop_fragment_mask_fetch) {
+       instr->op == nir_texop_samples_identical || instr->op == nir_texop_fragment_fetch_amd ||
+       instr->op == nir_texop_fragment_mask_fetch_amd) {
       aco_opcode op = level_zero || instr->sampler_dim == GLSL_SAMPLER_DIM_MS ||
                             instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS_MS
                          ? aco_opcode::image_load
diff --git a/src/amd/llvm/ac_nir_to_llvm.c b/src/amd/llvm/ac_nir_to_llvm.c
index aae8fd77c78..3cc69a4d966 100644
--- a/src/amd/llvm/ac_nir_to_llvm.c
+++ b/src/amd/llvm/ac_nir_to_llvm.c
@@ -1573,8 +1573,8 @@ static LLVMValueRef build_tex_intrinsic(struct ac_nir_context *ctx, const nir_te
    case nir_texop_lod:
       args->opcode = ac_image_get_lod;
       break;
-   case nir_texop_fragment_fetch:
-   case nir_texop_fragment_mask_fetch:
+   case nir_texop_fragment_fetch_amd:
+   case nir_texop_fragment_mask_fetch_amd:
       args->opcode = ac_image_load;
       args->level_zero = false;
       break;
@@ -4493,7 +4493,7 @@ static void tex_fetch_ptrs(struct ac_nir_context *ctx, nir_tex_instr *instr,
       main_descriptor = AC_DESC_PLANE_0 + plane;
    }
 
-   if (instr->op == nir_texop_fragment_mask_fetch) {
+   if (instr->op == nir_texop_fragment_mask_fetch_amd) {
       /* The fragment mask is fetched from the compressed
        * multisampled surface.
        */
@@ -4730,7 +4730,7 @@ static void visit_tex(struct ac_nir_context *ctx, nir_tex_instr *instr)
         instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS ||
         instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS_MS) &&
        instr->is_array && instr->op != nir_texop_txf && instr->op != nir_texop_txf_ms &&
-       instr->op != nir_texop_fragment_fetch && instr->op != nir_texop_fragment_mask_fetch) {
+       instr->op != nir_texop_fragment_fetch_amd && instr->op != nir_texop_fragment_mask_fetch_amd) {
       args.coords[2] = apply_round_slice(&ctx->ac, args.coords[2]);
    }
 
@@ -4748,7 +4748,7 @@ static void visit_tex(struct ac_nir_context *ctx, nir_tex_instr *instr)
    }
 
    /* Pack sample index */
-   if (sample_index && (instr->op == nir_texop_txf_ms || instr->op == nir_texop_fragment_fetch))
+   if (sample_index && (instr->op == nir_texop_txf_ms || instr->op == nir_texop_fragment_fetch_amd))
       args.coords[instr->coord_components] = sample_index;
 
    if (instr->op == nir_texop_samples_identical) {
@@ -4767,8 +4767,8 @@ static void visit_tex(struct ac_nir_context *ctx, nir_tex_instr *instr)
 
    if ((instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS_MS ||
         instr->sampler_dim == GLSL_SAMPLER_DIM_MS) &&
-       instr->op != nir_texop_txs && instr->op != nir_texop_fragment_fetch &&
-       instr->op != nir_texop_fragment_mask_fetch) {
+       instr->op != nir_texop_txs && instr->op != nir_texop_fragment_fetch_amd &&
+       instr->op != nir_texop_fragment_mask_fetch_amd) {
       unsigned sample_chan = instr->is_array ? 3 : 2;
       args.coords[sample_chan] = adjust_sample_index_using_fmask(
          &ctx->ac, args.coords[0], args.coords[1], instr->is_array ? args.coords[2] : NULL,
@@ -4811,7 +4811,7 @@ static void visit_tex(struct ac_nir_context *ctx, nir_tex_instr *instr)
     * multisampled images and (x,y,layer) for 2D multisampled layered
     * images or for multisampled input attachments.
     */
-   if (instr->op == nir_texop_fragment_mask_fetch) {
+   if (instr->op == nir_texop_fragment_mask_fetch_amd) {
       if (args.dim == ac_image_2dmsaa) {
          args.dim = ac_image_2d;
       } else {
diff --git a/src/compiler/nir/nir.h b/src/compiler/nir/nir.h
index a3f2ed6c1b6..3a4a439b461 100644
--- a/src/compiler/nir/nir.h
+++ b/src/compiler/nir/nir.h
@@ -2181,8 +2181,8 @@ typedef enum {
                                   * identical.
                                   */
    nir_texop_tex_prefetch,       /**< Regular texture look-up, eligible for pre-dispatch */
-   nir_texop_fragment_fetch,     /**< Multisample fragment color texture fetch */
-   nir_texop_fragment_mask_fetch,/**< Multisample fragment mask texture fetch */
+   nir_texop_fragment_fetch_amd,      /**< Multisample fragment color texture fetch */
+   nir_texop_fragment_mask_fetch_amd, /**< Multisample fragment mask texture fetch */
 } nir_texop;
 
 /** Represents a texture instruction */
@@ -2359,7 +2359,7 @@ nir_tex_instr_result_size(const nir_tex_instr *instr)
    case nir_texop_texture_samples:
    case nir_texop_query_levels:
    case nir_texop_samples_identical:
-   case nir_texop_fragment_mask_fetch:
+   case nir_texop_fragment_mask_fetch_amd:
       return 1;
 
    default:
diff --git a/src/compiler/nir/nir_lower_input_attachments.c b/src/compiler/nir/nir_lower_input_attachments.c
index 057a716b874..f449d4a151a 100644
--- a/src/compiler/nir/nir_lower_input_attachments.c
+++ b/src/compiler/nir/nir_lower_input_attachments.c
@@ -197,8 +197,8 @@ nir_lower_input_attachments(nir_shader *shader,
             case nir_instr_type_tex: {
                nir_tex_instr *tex = nir_instr_as_tex(instr);
 
-               if (tex->op == nir_texop_fragment_mask_fetch ||
-                   tex->op == nir_texop_fragment_fetch) {
+               if (tex->op == nir_texop_fragment_mask_fetch_amd ||
+                   tex->op == nir_texop_fragment_fetch_amd) {
                   progress |= try_lower_input_texop(function->impl, tex,
                                                     options);
                }
diff --git a/src/compiler/nir/nir_print.c b/src/compiler/nir/nir_print.c
index c81ce613c5e..b0f2110acbb 100644
--- a/src/compiler/nir/nir_print.c
+++ b/src/compiler/nir/nir_print.c
@@ -1103,11 +1103,11 @@ print_tex_instr(nir_tex_instr *instr, print_state *state)
    case nir_texop_tex_prefetch:
       fprintf(fp, "tex (pre-dispatchable) ");
       break;
-   case nir_texop_fragment_fetch:
-      fprintf(fp, "fragment_fetch ");
+   case nir_texop_fragment_fetch_amd:
+      fprintf(fp, "fragment_fetch_amd ");
       break;
-   case nir_texop_fragment_mask_fetch:
-      fprintf(fp, "fragment_mask_fetch ");
+   case nir_texop_fragment_mask_fetch_amd:
+      fprintf(fp, "fragment_mask_fetch_amd ");
       break;
    default:
       unreachable("Invalid texture operation");
diff --git a/src/compiler/spirv/spirv_to_nir.c b/src/compiler/spirv/spirv_to_nir.c
index fa80522cde1..3c261ba9f2e 100644
--- a/src/compiler/spirv/spirv_to_nir.c
+++ b/src/compiler/spirv/spirv_to_nir.c
@@ -2720,11 +2720,11 @@ vtn_handle_texture(struct vtn_builder *b, SpvOp opcode,
       break;
 
    case SpvOpFragmentFetchAMD:
-      texop = nir_texop_fragment_fetch;
+      texop = nir_texop_fragment_fetch_amd;
       break;
 
    case SpvOpFragmentMaskFetchAMD:
-      texop = nir_texop_fragment_mask_fetch;
+      texop = nir_texop_fragment_mask_fetch_amd;
       dest_type = nir_type_uint32;
       break;
 
@@ -2759,8 +2759,8 @@ vtn_handle_texture(struct vtn_builder *b, SpvOp opcode,
    case nir_texop_query_levels:
    case nir_texop_texture_samples:
    case nir_texop_samples_identical:
-   case nir_texop_fragment_fetch:
-   case nir_texop_fragment_mask_fetch:
+   case nir_texop_fragment_fetch_amd:
+   case nir_texop_fragment_mask_fetch_amd:
       /* These don't */
       break;
    case nir_texop_txf_ms_fb:



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