Mesa (staging/21.3): aco: fix invalid IR generated for b2f64 when the dest is a VGPR

GitLab Mirror gitlab-mirror at kemper.freedesktop.org
Tue Oct 19 20:59:46 UTC 2021


Module: Mesa
Branch: staging/21.3
Commit: 0554f7fa38209c8cfbf03ee29d56a7ba5f843df6
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=0554f7fa38209c8cfbf03ee29d56a7ba5f843df6

Author: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Date:   Tue Oct 19 14:01:45 2021 +0200

aco: fix invalid IR generated for b2f64 when the dest is a VGPR

Fixes few 64-bit piglit tests with Zink.

Cc: 21.3 mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02 at gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13435>
(cherry picked from commit e3cbb0eb6a7b998f33d5175274fd3a4bf4fd5973)

---

 .pick_status.json                              | 2 +-
 src/amd/compiler/aco_instruction_selection.cpp | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/.pick_status.json b/.pick_status.json
index 28a75414998..179dc28db45 100644
--- a/.pick_status.json
+++ b/.pick_status.json
@@ -256,7 +256,7 @@
         "description": "aco: fix invalid IR generated for b2f64 when the dest is a VGPR",
         "nominated": true,
         "nomination_type": 0,
-        "resolution": 0,
+        "resolution": 1,
         "main_sha": null,
         "because_sha": null
     },
diff --git a/src/amd/compiler/aco_instruction_selection.cpp b/src/amd/compiler/aco_instruction_selection.cpp
index b4ab24dd80e..eeb314a9e1d 100644
--- a/src/amd/compiler/aco_instruction_selection.cpp
+++ b/src/amd/compiler/aco_instruction_selection.cpp
@@ -3038,7 +3038,7 @@ visit_alu_instr(isel_context* ctx, nir_alu_instr* instr)
          bld.sop2(aco_opcode::s_cselect_b64, Definition(dst), Operand::c32(0x3f800000u),
                   Operand::zero(), bld.scc(src));
       } else if (dst.regClass() == v2) {
-         Temp one = bld.copy(bld.def(v2), Operand::c32(0x3FF00000u));
+         Temp one = bld.copy(bld.def(v1), Operand::c32(0x3FF00000u));
          Temp upper =
             bld.vop2_e64(aco_opcode::v_cndmask_b32, bld.def(v1), Operand::zero(), one, src);
          bld.pseudo(aco_opcode::p_create_vector, Definition(dst), Operand::zero(), upper);



More information about the mesa-commit mailing list