Mesa (main): intel/fs: Implement 16-bit [ui]mul_high
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Tue Apr 12 23:51:22 UTC 2022
Module: Mesa
Branch: main
Commit: a482877c701579fbe72c16e41a69ea1170f8baa9
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=a482877c701579fbe72c16e41a69ea1170f8baa9
Author: Jason Ekstrand <jason.ekstrand at collabora.com>
Date: Fri Apr 8 15:17:12 2022 -0500
intel/fs: Implement 16-bit [ui]mul_high
Reviewed-by: Matt Turner <mattst88 at gmail.com>
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15829>
---
src/intel/compiler/brw_fs_nir.cpp | 8 +++++++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/src/intel/compiler/brw_fs_nir.cpp b/src/intel/compiler/brw_fs_nir.cpp
index ae2565a6245..81fb50624a3 100644
--- a/src/intel/compiler/brw_fs_nir.cpp
+++ b/src/intel/compiler/brw_fs_nir.cpp
@@ -1359,7 +1359,13 @@ fs_visitor::nir_emit_alu(const fs_builder &bld, nir_alu_instr *instr,
case nir_op_imul_high:
case nir_op_umul_high:
assert(nir_dest_bit_size(instr->dest.dest) < 64);
- bld.emit(SHADER_OPCODE_MULH, result, op[0], op[1]);
+ if (nir_dest_bit_size(instr->dest.dest) == 32) {
+ bld.emit(SHADER_OPCODE_MULH, result, op[0], op[1]);
+ } else {
+ fs_reg tmp = bld.vgrf(brw_reg_type_from_bit_size(32, op[0].type));
+ bld.MUL(tmp, op[0], op[1]);
+ bld.MOV(result, subscript(tmp, result.type, 1));
+ }
break;
case nir_op_idiv:
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