Mesa (main): intel/isl: Fix depth buffer TiledSurface programming

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Module: Mesa
Branch: main
Commit: bc9ce9705c0e1fc76228ca4914fa2ce1e06a4394
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=bc9ce9705c0e1fc76228ca4914fa2ce1e06a4394

Author: Nanley Chery <nanley.g.chery at intel.com>
Date:   Mon Jan 31 16:07:34 2022 -0500

intel/isl: Fix depth buffer TiledSurface programming

The assert for the TiledSurface field caught a programming error, but
with a segfault instead of the usual route of assert-failing. We only
set this field when we have a depth surface, but we also need to set it
when one isn't provided. Fix this issue and drop the assert.

Fixes: b77d694223a ("intel/isl: Allow HiZ with Tile4/64 surfaces")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5950
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14825>

---

 src/intel/isl/isl_emit_depth_stencil.c | 6 ++----
 1 file changed, 2 insertions(+), 4 deletions(-)

diff --git a/src/intel/isl/isl_emit_depth_stencil.c b/src/intel/isl/isl_emit_depth_stencil.c
index b72ed25d3e6..887d5e11247 100644
--- a/src/intel/isl/isl_emit_depth_stencil.c
+++ b/src/intel/isl/isl_emit_depth_stencil.c
@@ -153,16 +153,14 @@ isl_genX(emit_depth_stencil_hiz_s)(const struct isl_device *dev, void *batch,
    if (separate_stencil || info->hiz_usage == ISL_AUX_USAGE_HIZ) {
       assert(ISL_DEV_USE_SEPARATE_STENCIL(dev));
       db.SeparateStencilBufferEnable = true;
+      db.HierarchicalDepthBufferEnable = true;
 
       /* From the IronLake PRM, Vol 2 Part 1,
        * 3DSTATE_DEPTH_BUFFER::Tiled Surface,
        *
        *    When Hierarchical Depth Buffer is enabled, this bit must be set.
-       *
-       * HiZ only works on tiled depth buffers.
        */
-      assert(info->depth_surf->tiling != ISL_TILING_LINEAR);
-      db.HierarchicalDepthBufferEnable = true;
+      db.TiledSurface = true;
    }
 #endif