Mesa (main): intel/isl: Simplify Z-buffer tiling config during emit

[GitLab Mirror]

Module: Mesa
Branch: main
Commit: 146213d0ee0b95a951e76b6493c7bb3ed92481a8
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=146213d0ee0b95a951e76b6493c7bb3ed92481a8

Author: Nanley Chery <nanley.g.chery at intel.com>
Date:   Tue Feb  1 13:51:06 2022 -0500

intel/isl: Simplify Z-buffer tiling config during emit

For SNB and prior, assert that the surface is Y-tiled and use constants
when configuring the tiling parameters. This makes a follow-on commit
clearer.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14825>

---

 src/intel/isl/isl_emit_depth_stencil.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/src/intel/isl/isl_emit_depth_stencil.c b/src/intel/isl/isl_emit_depth_stencil.c
index 1bc9b72acb7..b72ed25d3e6 100644
--- a/src/intel/isl/isl_emit_depth_stencil.c
+++ b/src/intel/isl/isl_emit_depth_stencil.c
@@ -129,9 +129,9 @@ isl_genX(emit_depth_stencil_hiz_s)(const struct isl_device *dev, void *batch,
       db.RenderCompressionFormat =
          isl_get_render_compression_format(info->depth_surf->format);
 #elif GFX_VER <= 6
-      db.TiledSurface = info->depth_surf->tiling != ISL_TILING_LINEAR;
-      db.TileWalk = info->depth_surf->tiling == ISL_TILING_Y0 ? TILEWALK_YMAJOR :
-                                                                TILEWALK_XMAJOR;
+      assert(info->depth_surf->tiling == ISL_TILING_Y0);
+      db.TiledSurface = true;
+      db.TileWalk = TILEWALK_YMAJOR;
       db.MIPMapLayoutMode = MIPLAYOUT_BELOW;
 #endif