Mesa (main): tu: Fix D32S8 resolves into D32 or S8 in sysmem mode

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Module: Mesa
Branch: main
Commit: eba8671e406e66e6c10d6b0c31532d0914433995
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=eba8671e406e66e6c10d6b0c31532d0914433995

Author: Danylo Piliaiev <dpiliaiev at igalia.com>
Date:   Thu Jun  2 13:52:05 2022 +0300

tu: Fix D32S8 resolves into D32 or S8 in sysmem mode

Fixes CTS tests in sysmem mode:
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint.compatibility_depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.compatibility_depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.compatibility_depth_zero_stencil_zero_testing_stencil
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint.compatibility_depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.compatibility_depth_zero_stencil_zero_testing_depth
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.compatibility_depth_zero_stencil_zero_testing_stencil

Signed-off-by: Danylo Piliaiev <dpiliaiev at igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16834>

---

 src/freedreno/ci/freedreno-a618-fails.txt | 11 ++--------
 src/freedreno/ci/freedreno-a630-fails.txt |  3 +++
 src/freedreno/vulkan/tu_clear_blit.c      | 35 +++++++++++++++++++++++--------
 3 files changed, 31 insertions(+), 18 deletions(-)

diff --git a/src/freedreno/ci/freedreno-a618-fails.txt b/src/freedreno/ci/freedreno-a618-fails.txt
index f52e4daf2fd..ab6f801c45c 100644
--- a/src/freedreno/ci/freedreno-a618-fails.txt
+++ b/src/freedreno/ci/freedreno-a618-fails.txt
@@ -41,12 +41,5 @@ dEQP-VK.api.info.get_physical_device_properties2.memory_properties,Fail
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint.compatibility_depth_zero_stencil_zero_testing_stencil,Fail
 dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint.compatibility_depth_zero_stencil_zero_testing_stencil,Fail
 
-# "../src/freedreno/vulkan/tu_clear_blit.c:2129: tu_resolve_sysmem: Assertion `src->image->vk_format == dst->image->vk_format' failed."
-bypass-dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint.compatibility_depth_zero_stencil_zero_testing_depth,Crash
-bypass-dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint.compatibility_depth_zero_stencil_zero_testing_stencil,Crash
-bypass-dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.compatibility_depth_zero_stencil_zero_testing_depth,Crash
-bypass-dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint_separate_layouts.compatibility_depth_zero_stencil_zero_testing_stencil,Crash
-bypass-dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint.compatibility_depth_zero_stencil_zero_testing_depth,Crash
-bypass-dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint.compatibility_depth_zero_stencil_zero_testing_stencil,Crash
-bypass-dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.compatibility_depth_zero_stencil_zero_testing_depth,Crash
-bypass-dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint_separate_layouts.compatibility_depth_zero_stencil_zero_testing_stencil,Crash
+bypass-dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint.compatibility_depth_zero_stencil_zero_testing_stencil,Fail
+bypass-dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint.compatibility_depth_zero_stencil_zero_testing_stencil,Fail
diff --git a/src/freedreno/ci/freedreno-a630-fails.txt b/src/freedreno/ci/freedreno-a630-fails.txt
index 28f6f30021e..ddcdf2cc501 100644
--- a/src/freedreno/ci/freedreno-a630-fails.txt
+++ b/src/freedreno/ci/freedreno-a630-fails.txt
@@ -1598,3 +1598,6 @@ gmem-dEQP-VK.synchronization2.none_stage.legacy_transfer_dst_to_transfer_src,Fai
 gmem-dEQP-VK.synchronization2.none_stage.legacy_transfer_dst_to_general,Fail
 gmem-dEQP-VK.synchronization2.none_stage.legacy_general_to_transfer_src,Fail
 gmem-dEQP-VK.synchronization2.none_stage.legacy_general_to_general,Fail
+
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d24_unorm_s8_uint.compatibility_depth_zero_stencil_zero_testing_stencil,Fail
+dEQP-VK.renderpass2.depth_stencil_resolve.image_2d_32_32.samples_2.d32_sfloat_s8_uint.compatibility_depth_zero_stencil_zero_testing_stencil,Fail
diff --git a/src/freedreno/vulkan/tu_clear_blit.c b/src/freedreno/vulkan/tu_clear_blit.c
index 4b3682d4ca8..3dd5bcbd4d3 100644
--- a/src/freedreno/vulkan/tu_clear_blit.c
+++ b/src/freedreno/vulkan/tu_clear_blit.c
@@ -2085,7 +2085,8 @@ resolve_sysmem(struct tu_cmd_buffer *cmd,
                uint32_t layer_mask,
                uint32_t layers,
                const VkRect2D *rect,
-               bool separate_ds)
+               bool src_separate_ds,
+               bool dst_separate_ds)
 {
    const struct blit_ops *ops = &r2d_ops;
 
@@ -2097,18 +2098,26 @@ resolve_sysmem(struct tu_cmd_buffer *cmd,
    ops->coords(cs, &rect->offset, &rect->offset, &rect->extent);
 
    for_each_layer(i, layer_mask, layers) {
-      if (separate_ds) {
+      if (src_separate_ds) {
          if (format == VK_FORMAT_D32_SFLOAT) {
             r2d_src_depth(cmd, cs, src, i, VK_FILTER_NEAREST);
-            ops->dst_depth(cs, dst, i);
          } else {
             r2d_src_stencil(cmd, cs, src, i, VK_FILTER_NEAREST);
-            ops->dst_stencil(cs, dst, i);
          }
       } else {
          ops->src(cmd, cs, &src->view, i, VK_FILTER_NEAREST);
+      }
+
+      if (dst_separate_ds) {
+         if (format == VK_FORMAT_D32_SFLOAT) {
+            ops->dst_depth(cs, dst, i);
+         } else {
+            ops->dst_stencil(cs, dst, i);
+         }
+      } else {
          ops->dst(cs, &dst->view, i);
       }
+
       ops->run(cmd, cs);
    }
 
@@ -2126,16 +2135,24 @@ tu_resolve_sysmem(struct tu_cmd_buffer *cmd,
                   uint32_t layers,
                   const VkRect2D *rect)
 {
-   assert(src->image->vk_format == dst->image->vk_format);
+   assert(src->image->vk_format == dst->image->vk_format ||
+          (vk_format_is_depth_or_stencil(src->image->vk_format) &&
+           vk_format_is_depth_or_stencil(dst->image->vk_format)));
+
+   bool src_separate_ds = src->image->vk_format == VK_FORMAT_D32_SFLOAT_S8_UINT;
+   bool dst_separate_ds = dst->image->vk_format == VK_FORMAT_D32_SFLOAT_S8_UINT;
 
-   if (dst->image->vk_format == VK_FORMAT_D32_SFLOAT_S8_UINT) {
+   if (dst_separate_ds) {
       resolve_sysmem(cmd, cs, VK_FORMAT_D32_SFLOAT,
-                     src, dst, layer_mask, layers, rect, true);
+                     src, dst, layer_mask, layers, rect,
+                     src_separate_ds, dst_separate_ds);
       resolve_sysmem(cmd, cs, VK_FORMAT_S8_UINT,
-                     src, dst, layer_mask, layers, rect, true);
+                     src, dst, layer_mask, layers, rect,
+                     src_separate_ds, dst_separate_ds);
    } else {
       resolve_sysmem(cmd, cs, dst->image->vk_format,
-                     src, dst, layer_mask, layers, rect, false);
+                     src, dst, layer_mask, layers, rect,
+                     src_separate_ds, dst_separate_ds);
    }
 }