Mesa (main): anv, iris: Add support for I915_ENGINE_CLASS_COMPUTE

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Module: Mesa
Branch: main
Commit: 0c90c695f5537f2dd5d5bde412ade9ef0b750e10
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=0c90c695f5537f2dd5d5bde412ade9ef0b750e10

Author: Jordan Justen <jordan.l.justen at intel.com>
Date:   Tue Aug 14 02:34:16 2018 -0700

anv, iris: Add support for I915_ENGINE_CLASS_COMPUTE

Signed-off-by: Jordan Justen <jordan.l.justen at intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira at intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
Reviewed-by: Kenneth Graunke <kenneth at whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14395>

---

 src/gallium/drivers/iris/iris_batch.c | 4 ++++
 src/intel/vulkan/anv_device.c         | 7 ++++++-
 2 files changed, 10 insertions(+), 1 deletion(-)

diff --git a/src/gallium/drivers/iris/iris_batch.c b/src/gallium/drivers/iris/iris_batch.c
index 71cb2096ad1..15eb5229af5 100644
--- a/src/gallium/drivers/iris/iris_batch.c
+++ b/src/gallium/drivers/iris/iris_batch.c
@@ -291,6 +291,10 @@ iris_create_engines_context(struct iris_context *ice, int priority)
    /* Blitter is only supported on Gfx12+ */
    unsigned num_batches = IRIS_BATCH_COUNT - (devinfo->ver >= 12 ? 0 : 1);
 
+   if (false /* Disable for now. We will enable with an env-var. */ &&
+       intel_gem_count_engines(engines_info, I915_ENGINE_CLASS_COMPUTE) > 0)
+      engine_classes[IRIS_BATCH_COMPUTE] = I915_ENGINE_CLASS_COMPUTE;
+
    int engines_ctx =
       intel_gem_create_context_engines(fd, engines_info, num_batches,
                                        engine_classes);
diff --git a/src/intel/vulkan/anv_device.c b/src/intel/vulkan/anv_device.c
index 0adcf7cf0a7..2e3255bbec2 100644
--- a/src/intel/vulkan/anv_device.c
+++ b/src/intel/vulkan/anv_device.c
@@ -701,6 +701,11 @@ anv_physical_device_init_queue_families(struct anv_physical_device *pdevice)
                                  I915_ENGINE_CLASS_RENDER);
       int g_count = 0;
       int c_count = 0;
+      if (false /* Disable for now. We will enable with an env-var. */)
+         c_count = intel_gem_count_engines(pdevice->engine_info,
+                                           I915_ENGINE_CLASS_COMPUTE);
+      enum drm_i915_gem_engine_class compute_class =
+         c_count < 1 ? I915_ENGINE_CLASS_RENDER : I915_ENGINE_CLASS_COMPUTE;
 
       anv_override_engine_counts(&gc_count, &g_count, &c_count);
 
@@ -726,7 +731,7 @@ anv_physical_device_init_queue_families(struct anv_physical_device *pdevice)
             .queueFlags = VK_QUEUE_COMPUTE_BIT |
                           VK_QUEUE_TRANSFER_BIT,
             .queueCount = c_count,
-            .engine_class = I915_ENGINE_CLASS_RENDER,
+            .engine_class = compute_class,
          };
       }
       /* Increase count below when other families are added as a reminder to