Mesa (main): radeonsi: use PIPE_RESOURCE_FLAG_UNMAPPABLE and DRIVER_INTERNAL more

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Module: Mesa
Branch: main
Commit: ac0becc6481a407995a0153c702a7ffade8d4ab4
URL:    http://cgit.freedesktop.org/mesa/mesa/commit/?id=ac0becc6481a407995a0153c702a7ffade8d4ab4

Author: Marek Olšák <marek.olsak at amd.com>
Date:   Tue May 10 16:36:00 2022 -0400

radeonsi: use PIPE_RESOURCE_FLAG_UNMAPPABLE and DRIVER_INTERNAL more

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer at amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16466>

---

 src/gallium/drivers/radeonsi/si_fence.c           |  1 +
 src/gallium/drivers/radeonsi/si_pipe.c            | 10 ++++++---
 src/gallium/drivers/radeonsi/si_state_shaders.cpp | 25 +++++++++++++++--------
 3 files changed, 25 insertions(+), 11 deletions(-)

diff --git a/src/gallium/drivers/radeonsi/si_fence.c b/src/gallium/drivers/radeonsi/si_fence.c
index 87d0cdcd571..86ea3d37c71 100644
--- a/src/gallium/drivers/radeonsi/si_fence.c
+++ b/src/gallium/drivers/radeonsi/si_fence.c
@@ -99,6 +99,7 @@ void si_cp_release_mem(struct si_context *ctx, struct radeon_cmdbuf *cs, unsigne
                ctx->eop_bug_scratch_tmz =
                   si_aligned_buffer_create(&sscreen->b,
                                            PIPE_RESOURCE_FLAG_ENCRYPTED |
+                                           PIPE_RESOURCE_FLAG_UNMAPPABLE |
                                            SI_RESOURCE_FLAG_DRIVER_INTERNAL,
                                            PIPE_USAGE_DEFAULT,
                                            16 * sscreen->info.max_render_backends, 256);
diff --git a/src/gallium/drivers/radeonsi/si_pipe.c b/src/gallium/drivers/radeonsi/si_pipe.c
index 8b8836ae57c..94b622a2b3f 100644
--- a/src/gallium/drivers/radeonsi/si_pipe.c
+++ b/src/gallium/drivers/radeonsi/si_pipe.c
@@ -491,7 +491,7 @@ static struct pipe_context *si_create_context(struct pipe_screen *screen, unsign
 
    if (sctx->gfx_level == GFX7 || sctx->gfx_level == GFX8 || sctx->gfx_level == GFX9) {
       sctx->eop_bug_scratch = si_aligned_buffer_create(
-         &sscreen->b, SI_RESOURCE_FLAG_DRIVER_INTERNAL,
+         &sscreen->b, PIPE_RESOURCE_FLAG_UNMAPPABLE | SI_RESOURCE_FLAG_DRIVER_INTERNAL,
          PIPE_USAGE_DEFAULT, 16 * sscreen->info.max_render_backends, 256);
       if (!sctx->eop_bug_scratch)
          goto fail;
@@ -671,7 +671,8 @@ static struct pipe_context *si_create_context(struct pipe_screen *screen, unsign
    if (sctx->gfx_level == GFX7) {
       sctx->null_const_buf.buffer =
          pipe_aligned_buffer_create(screen,
-                                    SI_RESOURCE_FLAG_32BIT | SI_RESOURCE_FLAG_DRIVER_INTERNAL,
+                                    PIPE_RESOURCE_FLAG_UNMAPPABLE | SI_RESOURCE_FLAG_32BIT |
+                                    SI_RESOURCE_FLAG_DRIVER_INTERNAL,
                                     PIPE_USAGE_DEFAULT, 16,
                                     sctx->screen->info.tcc_cache_line_size);
       if (!sctx->null_const_buf.buffer)
@@ -1352,7 +1353,10 @@ static struct pipe_screen *radeonsi_screen_create_impl(struct radeon_winsys *ws,
       unsigned attr_ring_size_per_se = align(1400000, 64 * 1024);
       unsigned attr_ring_size = attr_ring_size_per_se * sscreen->info.max_se;
       assert(attr_ring_size <= 16 * 1024 * 1024); /* maximum size */
-      sscreen->attribute_ring = si_aligned_buffer_create(&sscreen->b, SI_RESOURCE_FLAG_32BIT,
+      sscreen->attribute_ring = si_aligned_buffer_create(&sscreen->b,
+                                                         PIPE_RESOURCE_FLAG_UNMAPPABLE |
+                                                         SI_RESOURCE_FLAG_32BIT |
+                                                         SI_RESOURCE_FLAG_DRIVER_INTERNAL,
                                                          PIPE_USAGE_DEFAULT,
                                                          /* TODO: remove the overallocation */
                                                          attr_ring_size * 16, 2 * 1024 * 1024);
diff --git a/src/gallium/drivers/radeonsi/si_state_shaders.cpp b/src/gallium/drivers/radeonsi/si_state_shaders.cpp
index cf320504e69..14152c07e49 100644
--- a/src/gallium/drivers/radeonsi/si_state_shaders.cpp
+++ b/src/gallium/drivers/radeonsi/si_state_shaders.cpp
@@ -4014,18 +4014,27 @@ void si_init_tess_factor_ring(struct si_context *sctx)
    /* The address must be aligned to 2^19, because the shader only
     * receives the high 13 bits. Align it to 2MB to match the GPU page size.
     */
-   sctx->tess_rings = pipe_aligned_buffer_create(
-      sctx->b.screen, SI_RESOURCE_FLAG_32BIT | SI_RESOURCE_FLAG_DRIVER_INTERNAL, PIPE_USAGE_DEFAULT,
-      sctx->screen->hs.tess_offchip_ring_size + sctx->screen->hs.tess_factor_ring_size, 2 * 1024 * 1024);
+   sctx->tess_rings = pipe_aligned_buffer_create(sctx->b.screen,
+                                                 PIPE_RESOURCE_FLAG_UNMAPPABLE |
+                                                 SI_RESOURCE_FLAG_32BIT |
+                                                 SI_RESOURCE_FLAG_DRIVER_INTERNAL,
+                                                 PIPE_USAGE_DEFAULT,
+                                                 sctx->screen->hs.tess_offchip_ring_size +
+                                                 sctx->screen->hs.tess_factor_ring_size,
+                                                 2 * 1024 * 1024);
    if (!sctx->tess_rings)
       return;
 
    if (sctx->screen->info.has_tmz_support) {
-      sctx->tess_rings_tmz = pipe_aligned_buffer_create(
-         sctx->b.screen,
-         PIPE_RESOURCE_FLAG_ENCRYPTED | SI_RESOURCE_FLAG_32BIT | SI_RESOURCE_FLAG_DRIVER_INTERNAL,
-         PIPE_USAGE_DEFAULT,
-         sctx->screen->hs.tess_offchip_ring_size + sctx->screen->hs.tess_factor_ring_size, 2 * 1024 * 1024);
+      sctx->tess_rings_tmz = pipe_aligned_buffer_create(sctx->b.screen,
+                                                        PIPE_RESOURCE_FLAG_UNMAPPABLE |
+                                                        PIPE_RESOURCE_FLAG_ENCRYPTED |
+                                                        SI_RESOURCE_FLAG_32BIT |
+                                                        SI_RESOURCE_FLAG_DRIVER_INTERNAL,
+                                                        PIPE_USAGE_DEFAULT,
+                                                        sctx->screen->hs.tess_offchip_ring_size +
+                                                        sctx->screen->hs.tess_factor_ring_size,
+                                                        2 * 1024 * 1024);
    }
 
    uint64_t factor_va =