[Mesa-dev] TGSI thoughts

[Zack Rusin]

On Wednesday 28 July 2010 23:21:22 Jakob Bornecrantz wrote:
> I wrote some patches to the documentation that extracted some
> information from this thread I'm hoping I got nothing wrong. Number
> two and  four are the controversial patches.
> 
> The first patch just reorders and organizes the Core ISA subsections
> and adds paragraphs, this made it at least for me made it easier to
> read. Hopefully I didn't mess anything up here.
> 
> The second patch just says that the DDX and DDY opcodes are not in the
> Core ISA but instead is guarded by SM3 and GLSL cap bits.
> 
> Number three just makes the scalar result opcodes a bit easier to read.
> 
> Fourth adds some information about the ARL/ARA/ARR opcodes that I
> extracted from the the ARB_vertex_program extensions. The opcodes only
> read and write on the X channel and that they are the only
> instructions that can touch a address register.

I never really looked at the TGSI documentation before so I just took a peek 
and I skimmed over the patches and have a few general comments: 

- the categories are very weird and some of them just wrong (i.e. none of the 
"Compute" instructions actually relate to compute),
- the "ISA" header is used a little excessively, the categories aren't really 
instructions sets, they're just sub-groups of the TGSI instruction set, 
- TGSI doesn't stand for Tungsten Graphics Shader Infrastructure anymore, iirc 
it's "Tokenized Gallium Shader Instructions"

And as to the patches the fourth one isn't quite right - we allow indirect 
addressing in fragment and geometry shaders as well. Also we never really made 
it explicit that only the x channel can be used. So technically all four 
channels are available for addressing, of course as long as the actual 
addressing is done as a singular swizzle i.e.
ARL ADDR[0], TEMP[0]
MOV OUT[0], CONST[ADDR[0].y + 3]
having said iirc we're not doing that in Mesa.

z