[Mesa-dev] [PATCH 01/13] i915g: rip out ->sw_tiled
Daniel Vetter
daniel.vetter at ffwll.ch
Fri Nov 19 14:38:18 PST 2010
It looks like this was meant to facilitate unfenced access to textures/
color/renderbuffers. It's totally incomplete and fundamentally broken
on a few levels:
- broken: The kernel needs to about every tiled bo to fix up bit17
swizzling on swap-in.
- unflexible: fenced/unfenced relocs from execbuffer2 do the same, much
simpler.
- unneeded: with relaxed fencing tiled gem bos are as memory-efficient
as this trick.
Hence kill it.
Signed-off-by: Daniel Vetter <daniel.vetter at ffwll.ch>
---
src/gallium/drivers/i915/i915_resource.h | 1 -
src/gallium/drivers/i915/i915_resource_texture.c | 1 -
src/gallium/drivers/i915/i915_state_emit.c | 8 --------
src/gallium/drivers/i915/i915_state_sampler.c | 5 -----
4 files changed, 0 insertions(+), 15 deletions(-)
diff --git a/src/gallium/drivers/i915/i915_resource.h b/src/gallium/drivers/i915/i915_resource.h
index 1093e8f..1f87f56 100644
--- a/src/gallium/drivers/i915/i915_resource.h
+++ b/src/gallium/drivers/i915/i915_resource.h
@@ -56,7 +56,6 @@ struct i915_texture {
unsigned depth_stride; /* per-image on i945? */
unsigned total_nblocksy;
- unsigned sw_tiled; /**< tiled with software flags */
unsigned hw_tiled; /**< tiled with hardware fences */
unsigned nr_images[I915_MAX_TEXTURE_2D_LEVELS];
diff --git a/src/gallium/drivers/i915/i915_resource_texture.c b/src/gallium/drivers/i915/i915_resource_texture.c
index c5c6179..eb040fe 100644
--- a/src/gallium/drivers/i915/i915_resource_texture.c
+++ b/src/gallium/drivers/i915/i915_resource_texture.c
@@ -791,7 +791,6 @@ i915_texture_create(struct pipe_screen *screen,
/* setup any hw fences */
if (tex->hw_tiled) {
- assert(tex->sw_tiled == I915_TILE_NONE);
iws->buffer_set_fence_reg(iws, tex->buffer, tex->stride, tex->hw_tiled);
}
diff --git a/src/gallium/drivers/i915/i915_state_emit.c b/src/gallium/drivers/i915/i915_state_emit.c
index bd059d5..49dff1f 100644
--- a/src/gallium/drivers/i915/i915_state_emit.c
+++ b/src/gallium/drivers/i915/i915_state_emit.c
@@ -224,10 +224,6 @@ i915_emit_hardware_state(struct i915_context *i915 )
struct i915_texture *tex = i915_texture(cbuf_surface->texture);
assert(tex);
- if (tex && tex->sw_tiled) {
- ctile = BUF_3D_TILED_SURFACE;
- }
-
OUT_BATCH(_3DSTATE_BUF_INFO_CMD);
OUT_BATCH(BUF_3D_ID_COLOR_BACK |
@@ -246,10 +242,6 @@ i915_emit_hardware_state(struct i915_context *i915 )
struct i915_texture *tex = i915_texture(depth_surface->texture);
assert(tex);
- if (tex && tex->sw_tiled) {
- ztile = BUF_3D_TILED_SURFACE;
- }
-
OUT_BATCH(_3DSTATE_BUF_INFO_CMD);
assert(tex);
diff --git a/src/gallium/drivers/i915/i915_state_sampler.c b/src/gallium/drivers/i915/i915_state_sampler.c
index 4667e0b..9771274 100644
--- a/src/gallium/drivers/i915/i915_state_sampler.c
+++ b/src/gallium/drivers/i915/i915_state_sampler.c
@@ -267,11 +267,6 @@ static void update_map(struct i915_context *i915,
assert(format);
assert(pitch);
- if (tex->sw_tiled) {
- assert(!((pitch - 1) & pitch));
- tiled = MS3_TILED_SURFACE;
- }
-
/* MS3 state */
state[0] =
(((height - 1) << MS3_HEIGHT_SHIFT)
--
1.7.1
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