[Mesa-dev] [PATCH 02/13] i915g: s/hw_tiled/tiling

Daniel Vetter daniel.vetter at ffwll.ch
Fri Nov 19 14:38:19 PST 2010


More in line with other intel drivers.

Signed-off-by: Daniel Vetter <daniel.vetter at ffwll.ch>
---
 src/gallium/drivers/i915/i915_resource.h         |    4 ++--
 src/gallium/drivers/i915/i915_resource_texture.c |    8 ++++----
 2 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/src/gallium/drivers/i915/i915_resource.h b/src/gallium/drivers/i915/i915_resource.h
index 1f87f56..2da6920 100644
--- a/src/gallium/drivers/i915/i915_resource.h
+++ b/src/gallium/drivers/i915/i915_resource.h
@@ -52,12 +52,12 @@ struct i915_buffer {
 struct i915_texture {
    struct u_resource b;
 
+   /* tiling flags */
+   unsigned tiling;
    unsigned stride;
    unsigned depth_stride;          /* per-image on i945? */
    unsigned total_nblocksy;
 
-   unsigned hw_tiled; /**< tiled with hardware fences */
-
    unsigned nr_images[I915_MAX_TEXTURE_2D_LEVELS];
 
    /* Explicitly store the offset of each image for each cube face or
diff --git a/src/gallium/drivers/i915/i915_resource_texture.c b/src/gallium/drivers/i915/i915_resource_texture.c
index eb040fe..d45346b 100644
--- a/src/gallium/drivers/i915/i915_resource_texture.c
+++ b/src/gallium/drivers/i915/i915_resource_texture.c
@@ -165,7 +165,7 @@ i9x5_scanout_layout(struct i915_texture *tex)
    if (pt->width0 >= 240) {
       tex->stride = get_pot_stride(pt->format, pt->width0);
       tex->total_nblocksy = align_nblocksy(pt->format, pt->height0, 8);
-      tex->hw_tiled = I915_TILE_X;
+      tex->tiling = I915_TILE_X;
    } else if (pt->width0 == 64 && pt->height0 == 64) {
       tex->stride = get_pot_stride(pt->format, pt->width0);
       tex->total_nblocksy = align_nblocksy(pt->format, pt->height0, 8);
@@ -202,7 +202,7 @@ i9x5_display_target_layout(struct i915_texture *tex)
 
    tex->stride = get_pot_stride(pt->format, pt->width0);
    tex->total_nblocksy = align_nblocksy(pt->format, pt->height0, 8);
-   tex->hw_tiled = I915_TILE_X;
+   tex->tiling = I915_TILE_X;
 
 #if DEBUG_TEXTURE
    debug_printf("%s size: %d,%d,%d offset %d,%d (0x%x)\n", __FUNCTION__,
@@ -790,8 +790,8 @@ i915_texture_create(struct pipe_screen *screen,
       goto fail;
 
    /* setup any hw fences */
-   if (tex->hw_tiled) {
-      iws->buffer_set_fence_reg(iws, tex->buffer, tex->stride, tex->hw_tiled);
+   if (tex->tiling) {
+      iws->buffer_set_fence_reg(iws, tex->buffer, tex->stride, tex->tiling);
    }
 
    
-- 
1.7.1



More information about the mesa-dev mailing list