[Mesa-dev] [PATCH 07/10] i965/vs: Don't lower uniform array indexing.
Eric Anholt
eric at anholt.net
Tue Aug 23 18:25:54 PDT 2011
This avoids the massive conditional move array access, and brings code
generation quality for the new VS backend into the realm of efficiency
of the old backend (roughly 20% more instructions generated than
before across shader-db, instead of assertion failing for generating
over 10,000 instructions on many shaders!).
---
src/mesa/drivers/dri/i965/brw_shader.cpp | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_shader.cpp b/src/mesa/drivers/dri/i965/brw_shader.cpp
index 3ff6bba..159cfc4 100644
--- a/src/mesa/drivers/dri/i965/brw_shader.cpp
+++ b/src/mesa/drivers/dri/i965/brw_shader.cpp
@@ -119,7 +119,7 @@ brw_link_shader(struct gl_context *ctx, struct gl_shader_program *prog)
bool input = true;
bool output = stage == MESA_SHADER_FRAGMENT;
bool temp = stage == MESA_SHADER_FRAGMENT;
- bool uniform = true;
+ bool uniform = stage == MESA_SHADER_FRAGMENT;
lower_variable_index_to_cond_assign(shader->ir,
input, output, temp, uniform);
--
1.7.5.4
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