[Mesa-dev] [PATCH 3/3] intel: Document that stencil buffer is W tiled

[Chad Versace]

... in intel_alloc_renderbuffer_storage.

Note: This is a candidate for the 7.11 branch
Signed-off-by: Chad Versace <chad at chad-versace.us>
---
 src/mesa/drivers/dri/intel/intel_fbo.c |    5 +++++
 1 files changed, 5 insertions(+), 0 deletions(-)

diff --git a/src/mesa/drivers/dri/intel/intel_fbo.c b/src/mesa/drivers/dri/intel/intel_fbo.c
index 5ea83cf..840fec6 100644
--- a/src/mesa/drivers/dri/intel/intel_fbo.c
+++ b/src/mesa/drivers/dri/intel/intel_fbo.c
@@ -191,6 +191,11 @@ intel_alloc_renderbuffer_storage(struct gl_context * ctx, struct gl_renderbuffer
        *
        * If we neglect to double the pitch, then drm_intel_gem_bo_map_gtt()
        * maps the memory incorrectly.
+       *
+       * Also, despite requesting that the stencil buffer be Y tiled, it is in
+       * fact W tiled. From PRM Vol 1 Part 2 Section 4.5.2.1 W-Major Tile
+       * Format:
+       *     "W-Major Tile Format is used for separate stencil."
        */
       irb->region = intel_region_alloc(intel->intelScreen,
 				       I915_TILING_Y,
-- 
1.7.5.4