[Mesa-dev] [PATCH v3] i965: Check actual tile offsets in Gen4 miptree workaround.

[Chad Versace]

Comments below.

On 07/27/2011 04:58 PM, Kenneth Graunke wrote:
> The purpose of the (irb->draw_offset & 4095) != 0 check was to ensure
> that we don't have XYy offsets into a tile, since Gen4 hardware doesn't
> support that.  However, it's insufficient: there are cases where
> draw_offset & 4095 is 0 but we still have a Y-offset.  This leads to an
> assertion failure in brw_update_renderbuffer_surface with tile_y != 0.
> 
> Instead, simply call intel_renderbuffer_tile_offsets to compute the
> actual X/Y offsets and check if either are non-zero.  This makes both
> the workaround and the assertion check the same things.
> 
> Fixes piglit test fbo-generatemipmap-formats, and should also fix
> bugs #34009 and #39487.
> 
> NOTE: This is a candidate for stable release branches.
> 
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=34009
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=39487
> Cc: Chad Versace <chad at chad-versace.us>
> Cc: Eric Anholt <eric at anholt.net>
> Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
> ---
>  src/mesa/drivers/dri/intel/intel_fbo.c |   26 ++++++++++++++++++++++++--
>  1 files changed, 24 insertions(+), 2 deletions(-)
> 
> v3: The depth wrapper chasing apparently broke on Gen4.  Hopefully this one
>     should work on all platforms...

By inspection, I doubt this works on Gen7.

need_tile_offset_workaround() may return true on a depth buffer. When it does return
true, the region reference below is invalid but succeeds anyway.

static void
intel_render_texture(struct gl_context * ctx,
                     struct gl_framebuffer *fb,
                     struct gl_renderbuffer_attachment *att)
{
   ...
   if (need_tile_offset_workaround(...)) {
      ...
      intel_region_reference(&irb->region, intel_image->mt->region);
      ...
}

> 
> diff --git a/src/mesa/drivers/dri/intel/intel_fbo.c b/src/mesa/drivers/dri/intel/intel_fbo.c
> index 35be325..4c0b378 100644
> --- a/src/mesa/drivers/dri/intel/intel_fbo.c
> +++ b/src/mesa/drivers/dri/intel/intel_fbo.c
> @@ -647,6 +647,29 @@ intel_renderbuffer_tile_offsets(struct intel_renderbuffer *irb,
>     }
>  }
>  
> +#ifndef I915
> +static bool
> +need_tile_offset_workaround(struct brw_context *brw,
> +			    struct intel_renderbuffer *irb)
> +{
> +   uint32_t tile_x, tile_y;
> +
> +   /* intel_renderbuffer_tile_offsets needs a non-NULL region, but
> +    * combined depth/stencil wrappers don't have one.  Resolve irb to
> +    * the actual depth buffer first.
> +    */
> +   if (irb->wrapped_depth != NULL)
> +      irb = irb->wrapped_depth;
> +
> +   intel_renderbuffer_tile_offsets(irb, &tile_x, &tile_y);
> +
> +   if (!brw->has_surface_tile_offset)
> +      return tile_x != 0 || tile_y != 0;
> +
> +   return false;
> +}
> +#endif
> +
>  /**
>   * Called by glFramebufferTexture[123]DEXT() (and other places) to
>   * prepare for rendering into texture memory.  This might be called
> @@ -700,8 +723,7 @@ intel_render_texture(struct gl_context * ctx,
>     intel_image->used_as_render_target = GL_TRUE;
>  
>  #ifndef I915
> -   if (!brw_context(ctx)->has_surface_tile_offset &&
> -       (irb->draw_offset & 4095) != 0) {
> +   if (need_tile_offset_workaround(brw_context(ctx), irb)) {
>        /* Original gen4 hardware couldn't draw to a non-tile-aligned
>         * destination in a miptree unless you actually setup your
>         * renderbuffer as a miptree and used the fragile



-- 
Chad Versace
chad at chad-versace.us