[Mesa-dev] [PATCH] i965/gen6+: Use 3D clears on to avoid inter-ring synchronization.

[Eric Anholt]

Improves firefox-talos-gfx around 5%.
---

This patch regresses glean/fbo and these two ARB_cbf runs:
./bin/arb_color_buffer_float-render GL_RGBA8 fog 
./bin/arb_color_buffer_float-render GL_RGBA8 sanity fog

I'd love if anyone else could take a look at it and figure out what's
going on here.  Unfortunately all 3 of these tests are rather large
and thus more painful to debug than I would hope.

 src/mesa/drivers/dri/intel/intel_clear.c |    4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/mesa/drivers/dri/intel/intel_clear.c b/src/mesa/drivers/dri/intel/intel_clear.c
index 5a96232..5394307 100644
--- a/src/mesa/drivers/dri/intel/intel_clear.c
+++ b/src/mesa/drivers/dri/intel/intel_clear.c
@@ -116,14 +116,14 @@ intelClear(struct gl_context *ctx, GLbitfield mask)
    }
 
    /* HW color buffers (front, back, aux, generic FBO, etc) */
-   if (colorMask == ~0) {
+   if (intel->gen < 6 && colorMask == ~0) {
       /* clear all R,G,B,A */
       /* XXX FBO: need to check if colorbuffers are software RBOs! */
       blit_mask |= (mask & BUFFER_BITS_COLOR);
    }
    else {
       /* glColorMask in effect */
-      tri_mask |= (mask & (BUFFER_BIT_FRONT_LEFT | BUFFER_BIT_BACK_LEFT));
+      tri_mask |= (mask & BUFFER_BITS_COLOR);
    }
 
    /* Make sure we have up to date buffers before we start looking at
-- 
1.7.5.4