[Mesa-dev] [PATCH 09/14] i965: Change FBO completeness criteria when HiZ is enabled
chad at chad-versace.us
chad at chad-versace.us
Wed May 4 13:33:53 PDT 2011
From: Chad Versace <chad.versace at intel.com>
When HiZ is enabled, hardware allows rendering to a separate stencil
region and does not allow rendering to a combined depth/stencil region.
So we need to:
1. Set an FBO's status to GL_FRAMEBUFFER_UNSUPPORTED when HiZ is enabled
and its depth and stencil attachments are identical or share the same
texture target.
2. Fix the logic in intel_draw_buffer() that expects combined
depth/stencil.
Signed-off-by: Chad Versace <chad.versace at intel.com>
---
src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 3 +-
src/mesa/drivers/dri/intel/intel_buffers.c | 19 ++++++----
src/mesa/drivers/dri/intel/intel_fbo.c | 41 +++++++++++++--------
src/mesa/drivers/dri/intel/intel_span.c | 1 +
4 files changed, 39 insertions(+), 25 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
index 47b8b51..28c9562 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
@@ -125,7 +125,8 @@ brw_render_target_supported(gl_format format)
/* These are not color render targets like the table holds, but we
* ask the question for FBO completeness.
*/
- if (format == MESA_FORMAT_S8_Z24 ||
+ if (format == MESA_FORMAT_S8 ||
+ format == MESA_FORMAT_S8_Z24 ||
format == MESA_FORMAT_X8_Z24 ||
format == MESA_FORMAT_Z16) {
return true;
diff --git a/src/mesa/drivers/dri/intel/intel_buffers.c b/src/mesa/drivers/dri/intel/intel_buffers.c
index ee551ef..7167207 100644
--- a/src/mesa/drivers/dri/intel/intel_buffers.c
+++ b/src/mesa/drivers/dri/intel/intel_buffers.c
@@ -93,6 +93,7 @@ intel_draw_buffer(struct gl_context * ctx, struct gl_framebuffer *fb)
struct intel_context *intel = intel_context(ctx);
struct intel_region *colorRegions[MAX_DRAW_BUFFERS], *depthRegion = NULL;
struct intel_renderbuffer *irbDepth = NULL, *irbStencil = NULL;
+ bool fb_has_hiz = intel_framebuffer_has_hiz(fb);
if (!fb) {
/* this can happen during the initial context initialization */
@@ -166,13 +167,15 @@ intel_draw_buffer(struct gl_context * ctx, struct gl_framebuffer *fb)
/***
*** Get depth buffer region and check if we need a software fallback.
- *** Note that the depth buffer is usually a DEPTH_STENCIL buffer.
***/
if (fb->_DepthBuffer && fb->_DepthBuffer->Wrapped) {
irbDepth = intel_renderbuffer(fb->_DepthBuffer->Wrapped);
if (irbDepth && irbDepth->region) {
FALLBACK(intel, INTEL_FALLBACK_DEPTH_BUFFER, GL_FALSE);
depthRegion = irbDepth->region;
+
+ /* Combined depth/stencil formats cannot be used with HiZ. */
+ assert(!fb_has_hiz || irbDepth->Base.Format != MESA_FORMAT_S8_Z24);
}
else {
FALLBACK(intel, INTEL_FALLBACK_DEPTH_BUFFER, GL_TRUE);
@@ -185,15 +188,15 @@ intel_draw_buffer(struct gl_context * ctx, struct gl_framebuffer *fb)
depthRegion = NULL;
}
- /***
- *** Stencil buffer
- *** This can only be hardware accelerated if we're using a
- *** combined DEPTH_STENCIL buffer.
- ***/
+ /* Stencil buffer */
if (fb->_StencilBuffer && fb->_StencilBuffer->Wrapped) {
irbStencil = intel_renderbuffer(fb->_StencilBuffer->Wrapped);
if (irbStencil && irbStencil->region) {
- ASSERT(irbStencil->Base.Format == MESA_FORMAT_S8_Z24);
+ if (fb_has_hiz) {
+ assert(irbStencil->Base.Format == MESA_FORMAT_S8);
+ } else {
+ assert(irbStencil->Base.Format == MESA_FORMAT_S8_Z24);
+ }
FALLBACK(intel, INTEL_FALLBACK_STENCIL_BUFFER, GL_FALSE);
}
else {
@@ -208,7 +211,7 @@ intel_draw_buffer(struct gl_context * ctx, struct gl_framebuffer *fb)
/* If we have a (packed) stencil buffer attached but no depth buffer,
* we still need to set up the shared depth/stencil state so we can use it.
*/
- if (depthRegion == NULL && irbStencil && irbStencil->region)
+ if (!fb_has_hiz && !depthRegion && irbStencil && irbStencil->region)
depthRegion = irbStencil->region;
/*
diff --git a/src/mesa/drivers/dri/intel/intel_fbo.c b/src/mesa/drivers/dri/intel/intel_fbo.c
index 42dcf7a..1b67917 100644
--- a/src/mesa/drivers/dri/intel/intel_fbo.c
+++ b/src/mesa/drivers/dri/intel/intel_fbo.c
@@ -642,22 +642,31 @@ intel_validate_framebuffer(struct gl_context *ctx, struct gl_framebuffer *fb)
const struct intel_renderbuffer *stencilRb =
intel_get_renderbuffer(fb, BUFFER_STENCIL);
int i;
-
- if (depthRb && stencilRb && stencilRb != depthRb) {
- if (fb->Attachment[BUFFER_DEPTH].Type == GL_TEXTURE &&
- fb->Attachment[BUFFER_STENCIL].Type == GL_TEXTURE &&
- (fb->Attachment[BUFFER_DEPTH].Texture->Name ==
- fb->Attachment[BUFFER_STENCIL].Texture->Name)) {
- /* OK */
- } else {
- /* we only support combined depth/stencil buffers, not separate
- * stencil buffers.
- */
- DBG("Only supports combined depth/stencil (found %s, %s)\n",
- depthRb ? _mesa_get_format_name(depthRb->Base.Format): "NULL",
- stencilRb ? _mesa_get_format_name(stencilRb->Base.Format): "NULL");
- fb->_Status = GL_FRAMEBUFFER_UNSUPPORTED_EXT;
- }
+ bool fb_has_hiz = intel_framebuffer_has_hiz(fb);
+ int combined_depth_stencil;
+
+ if (depthRb && stencilRb && depthRb == stencilRb)
+ combined_depth_stencil = true;
+ else if (depthRb && stencilRb
+ && (fb->Attachment[BUFFER_DEPTH].Type == GL_TEXTURE)
+ && (fb->Attachment[BUFFER_STENCIL].Type == GL_TEXTURE)
+ && (fb->Attachment[BUFFER_DEPTH].Texture->Name
+ == fb->Attachment[BUFFER_STENCIL].Texture->Name))
+ combined_depth_stencil = true;
+ else
+ combined_depth_stencil = false;
+
+ if (fb_has_hiz && combined_depth_stencil) {
+ DBG("Combined depth/stencil is unsupported when framebuffer has HiZ\n");
+ fb->_Status = GL_FRAMEBUFFER_UNSUPPORTED_EXT;
+ } else if (!fb_has_hiz
+ && ((depthRb && stencilRb && !combined_depth_stencil)
+ || (!depthRb && stencilRb))) {
+ DBG("Separate stencil requires HiZ\n"
+ "Found depth format %s, stencil format %s\n",
+ depthRb ? _mesa_get_format_name(depthRb->Base.Format): "NULL",
+ stencilRb ? _mesa_get_format_name(stencilRb->Base.Format): "NULL");
+ fb->_Status = GL_FRAMEBUFFER_UNSUPPORTED_EXT;
}
for (i = 0; i < Elements(fb->Attachment); i++) {
diff --git a/src/mesa/drivers/dri/intel/intel_span.c b/src/mesa/drivers/dri/intel/intel_span.c
index 16bce20..076b5d9 100644
--- a/src/mesa/drivers/dri/intel/intel_span.c
+++ b/src/mesa/drivers/dri/intel/intel_span.c
@@ -333,6 +333,7 @@ static span_init_func intel_span_init_funcs[MESA_FORMAT_COUNT] =
[MESA_FORMAT_ARGB8888] = intel_InitPointers_ARGB8888,
[MESA_FORMAT_SARGB8] = intel_InitPointers_ARGB8888,
[MESA_FORMAT_Z16] = _mesa_set_renderbuffer_accessors,
+ [MESA_FORMAT_S8] = _mesa_set_renderbuffer_accessors,
[MESA_FORMAT_X8_Z24] = _mesa_set_renderbuffer_accessors,
[MESA_FORMAT_S8_Z24] = _mesa_set_renderbuffer_accessors,
[MESA_FORMAT_R8] = _mesa_set_renderbuffer_accessors,
--
1.7.5
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