[Mesa-dev] [PATCH] i965/gen4: Fix sampling from integer textures.
Eric Anholt
eric at anholt.net
Wed Nov 9 16:11:33 PST 2011
On original gen4, the surface format didn't determine the return data
type from sampling like it does on g45 and later.
Fixes GL_EXT_texture_integer/texture_integer_glsl130
---
The dst type in your patch has already been smashed to UW for 16-wide,
so it didn't end up working.
src/mesa/drivers/dri/i965/brw_eu.h | 3 ++-
src/mesa/drivers/dri/i965/brw_eu_emit.c | 11 +++++++----
src/mesa/drivers/dri/i965/brw_fs_emit.cpp | 16 +++++++++++++++-
src/mesa/drivers/dri/i965/brw_wm_emit.c | 6 ++++--
4 files changed, 28 insertions(+), 8 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_eu.h b/src/mesa/drivers/dri/i965/brw_eu.h
index 33492f6..dcb1fc9 100644
--- a/src/mesa/drivers/dri/i965/brw_eu.h
+++ b/src/mesa/drivers/dri/i965/brw_eu.h
@@ -928,7 +928,8 @@ void brw_SAMPLE(struct brw_compile *p,
GLuint response_length,
GLuint msg_length,
GLuint header_present,
- GLuint simd_mode);
+ GLuint simd_mode,
+ GLuint return_format);
void brw_math_16( struct brw_compile *p,
struct brw_reg dest,
diff --git a/src/mesa/drivers/dri/i965/brw_eu_emit.c b/src/mesa/drivers/dri/i965/brw_eu_emit.c
index dbb42f4..60350ca 100644
--- a/src/mesa/drivers/dri/i965/brw_eu_emit.c
+++ b/src/mesa/drivers/dri/i965/brw_eu_emit.c
@@ -650,7 +650,8 @@ static void brw_set_sampler_message(struct brw_compile *p,
GLuint response_length,
GLuint msg_length,
GLuint header_present,
- GLuint simd_mode)
+ GLuint simd_mode,
+ GLuint return_format)
{
struct brw_context *brw = p->brw;
struct intel_context *intel = &brw->intel;
@@ -676,7 +677,7 @@ static void brw_set_sampler_message(struct brw_compile *p,
insn->bits3.sampler.binding_table_index = binding_table_index;
insn->bits3.sampler.sampler = sampler;
insn->bits3.sampler.msg_type = msg_type;
- insn->bits3.sampler.return_format = BRW_SAMPLER_RETURN_FORMAT_FLOAT32;
+ insn->bits3.sampler.return_format = return_format;
}
}
@@ -2086,7 +2087,8 @@ void brw_SAMPLE(struct brw_compile *p,
GLuint response_length,
GLuint msg_length,
GLuint header_present,
- GLuint simd_mode)
+ GLuint simd_mode,
+ GLuint return_format)
{
struct intel_context *intel = &p->brw->intel;
bool need_stall = 0;
@@ -2180,7 +2182,8 @@ void brw_SAMPLE(struct brw_compile *p,
response_length,
msg_length,
header_present,
- simd_mode);
+ simd_mode,
+ return_format);
}
if (need_stall) {
diff --git a/src/mesa/drivers/dri/i965/brw_fs_emit.cpp b/src/mesa/drivers/dri/i965/brw_fs_emit.cpp
index ad4fae2..1ac215e 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_emit.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_emit.cpp
@@ -256,6 +256,19 @@ fs_visitor::generate_tex(fs_inst *inst, struct brw_reg dst, struct brw_reg src)
int msg_type = -1;
int rlen = 4;
uint32_t simd_mode = BRW_SAMPLER_SIMD_MODE_SIMD8;
+ uint32_t return_format;
+
+ switch (dst.type) {
+ case BRW_REGISTER_TYPE_D:
+ return_format = BRW_SAMPLER_RETURN_FORMAT_SINT32;
+ break;
+ case BRW_REGISTER_TYPE_UD:
+ return_format = BRW_SAMPLER_RETURN_FORMAT_UINT32;
+ break;
+ default:
+ return_format = BRW_SAMPLER_RETURN_FORMAT_FLOAT32;
+ break;
+ }
if (c->dispatch_width == 16)
simd_mode = BRW_SAMPLER_SIMD_MODE_SIMD16;
@@ -369,7 +382,8 @@ fs_visitor::generate_tex(fs_inst *inst, struct brw_reg dst, struct brw_reg src)
rlen,
inst->mlen,
inst->header_present,
- simd_mode);
+ simd_mode,
+ return_format);
}
diff --git a/src/mesa/drivers/dri/i965/brw_wm_emit.c b/src/mesa/drivers/dri/i965/brw_wm_emit.c
index a451d56..b5a4a4f 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_emit.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_emit.c
@@ -1162,7 +1162,8 @@ void emit_tex(struct brw_wm_compile *c,
response_length,
cur_mrf - 1,
1,
- simd_mode);
+ simd_mode,
+ BRW_SAMPLER_RETURN_FORMAT_FLOAT32);
}
@@ -1240,7 +1241,8 @@ void emit_txb(struct brw_wm_compile *c,
response_length,
msgLength,
1,
- BRW_SAMPLER_SIMD_MODE_SIMD16);
+ BRW_SAMPLER_SIMD_MODE_SIMD16,
+ BRW_SAMPLER_RETURN_FORMAT_FLOAT32);
}
--
1.7.7
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