[Mesa-dev] [PATCH 02/13] i965 vs: Make reg_allocate() return total_grf.

[Paul Berry]

Previously, reg_allocate() (and reg_allocate_trivial()) stored the
total number of registers allocated (including payload registers) in
vec4_visitor::total_grf.  Now, it returns this value to
vec4_visitor::run(), which stores it in total_grf.

This helps pave the way for separating the IR visiting parts of
vec4_visitor (which include run()) from the code generation parts
(which include reg_allocate()) by making the data flow explicit
between them.
---
 src/mesa/drivers/dri/i965/brw_vec4.h               |    4 +-
 src/mesa/drivers/dri/i965/brw_vec4_emit.cpp        |    2 +-
 .../drivers/dri/i965/brw_vec4_reg_allocate.cpp     |   24 ++++++++++---------
 3 files changed, 16 insertions(+), 14 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_vec4.h b/src/mesa/drivers/dri/i965/brw_vec4.h
index c03bcad..b942284 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4.h
+++ b/src/mesa/drivers/dri/i965/brw_vec4.h
@@ -390,8 +390,8 @@ public:
    int setup_attributes(int payload_reg);
    int setup_uniforms(int payload_reg);
    void setup_payload();
-   void reg_allocate_trivial();
-   void reg_allocate();
+   int reg_allocate_trivial();
+   int reg_allocate();
    void move_grf_array_access_to_scratch();
    void move_uniform_array_access_to_pull_constants();
    void move_push_constants_to_pull_constants();
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_emit.cpp b/src/mesa/drivers/dri/i965/brw_vec4_emit.cpp
index 54bbe13..f2a100b 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_emit.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_emit.cpp
@@ -657,7 +657,7 @@ vec4_visitor::run()
       return false;
 
    setup_payload();
-   reg_allocate();
+   prog_data->total_grf = reg_allocate();
 
    if (failed)
       return false;
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp b/src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp
index 1ace91f..7848656 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp
@@ -41,7 +41,7 @@ assign(int *reg_hw_locations, reg *reg)
    }
 }
 
-void
+int
 vec4_visitor::reg_allocate_trivial()
 {
    int hw_reg_mapping[this->virtual_grf_count];
@@ -76,7 +76,7 @@ vec4_visitor::reg_allocate_trivial()
 	 next += this->virtual_grf_sizes[i];
       }
    }
-   prog_data->total_grf = next;
+   int total_grf = next;
 
    foreach_iter(exec_list_iterator, iter, this->instructions) {
       vec4_instruction *inst = (vec4_instruction *)iter.get();
@@ -87,10 +87,12 @@ vec4_visitor::reg_allocate_trivial()
       assign(hw_reg_mapping, &inst->src[2]);
    }
 
-   if (prog_data->total_grf > BRW_MAX_GRF) {
+   if (total_grf > BRW_MAX_GRF) {
       fail("Ran out of regs on trivial allocator (%d/%d)\n",
-	   prog_data->total_grf, BRW_MAX_GRF);
+	   total_grf, BRW_MAX_GRF);
    }
+
+   return total_grf;
 }
 
 static void
@@ -139,7 +141,7 @@ brw_alloc_reg_set_for_classes(struct brw_context *brw,
    ra_set_finalize(brw->vs.regs);
 }
 
-void
+int
 vec4_visitor::reg_allocate()
 {
    int hw_reg_mapping[virtual_grf_count];
@@ -152,8 +154,7 @@ vec4_visitor::reg_allocate()
     * register access as a result of broken optimization passes.
     */
    if (0) {
-      reg_allocate_trivial();
-      return;
+      return reg_allocate_trivial();
    }
 
    calculate_live_intervals();
@@ -205,20 +206,19 @@ vec4_visitor::reg_allocate()
    if (!ra_allocate_no_spills(g)) {
       ralloc_free(g);
       fail("No register spilling support yet\n");
-      return;
+      return 0;
    }
 
    /* Get the chosen virtual registers for each node, and map virtual
     * regs in the register classes back down to real hardware reg
     * numbers.
     */
-   prog_data->total_grf = first_assigned_grf;
+   int total_grf = first_assigned_grf;
    for (int i = 0; i < virtual_grf_count; i++) {
       int reg = ra_get_node_reg(g, i);
 
       hw_reg_mapping[i] = first_assigned_grf + brw->vs.ra_reg_to_grf[reg];
-      prog_data->total_grf = MAX2(prog_data->total_grf,
-				  hw_reg_mapping[i] + virtual_grf_sizes[i]);
+      total_grf = MAX2(total_grf, hw_reg_mapping[i] + virtual_grf_sizes[i]);
    }
 
    foreach_list(node, &this->instructions) {
@@ -231,6 +231,8 @@ vec4_visitor::reg_allocate()
    }
 
    ralloc_free(g);
+
+   return total_grf;
 }
 
 } /* namespace brw */
-- 
1.7.6.4