[Mesa-dev] [PATCH 00/41] i965/gen6: Enable HiZ by default

[Chad Versace]

Rejoice, the long journey is complete. At least for gen6.

Regresses one Piglit test: glean/fbo.

I'm not enabling HiZ for gen7 yet because it causes a mysterious
performance regression.

Chad Versace (40):
  intel: Don't use special stencil span accessors
  intel: Fix swrast_render_start() for depthstencil buffers with
    separate stencil
  intel: Always gather stencil buffer in
    intel_map_renderbuffer_separate_s8z24()
  intel: Temporarily disable HiZ for textures
  intel: Kill intel_framebuffer_get_hiz_region()
  intel: Move inline functions from intel_fbo.h to .c
  intel: Define intel_miptree_create_for_renderbuffer()
  intel: Replace intel_renderbuffer::region with a miptree
  intel: Refactor intel_mipmap_level offsets
  intel: Refactor intel_miptree_copy_teximage()
  intel: Kill intel_mipmap_level::nr_images
  intel: Track the miptree layer wrapped by a renderbuffer
  intel: Remove unneeded params from
    intel_renderbuffer_set_draw_offset()
  intel: Define intel_miptree_check_level_layer()
  intel: Refactor intel_render_texture()
  intel: Replace intel_texture_image::stencil_irb with
    intel_mipmap_tree::stencil_mt
  intel: Replace intel_mipmap_tree::hiz_region with a miptree
  intel: Remove unused HiZ functions
  intel: Change signature of HiZ resolve functions
  intel: Define struct intel_resolve_map
  intel: Add field intel_mipmap_tree::hiz_map
  intel: Add resolve functions for miptrees
  intel: Add resolve functions for renderbuffers
  i965: Add HiZ operation state to brw_context
  i965/gen6: Complete stubs for HiZ buffer resolves
  i965/gen6: Manipulate state batches for HiZ meta-ops
  i965: Prevent recursive calls to FLUSH_VERTICES
  i965: Resolve buffers before drawing
  intel: Refactor intelSpanRenderStart
  intel: Resolve buffers in intelSpanRenderStart
  i965: Mark that depth buffer needs depth resolve after drawing
  intel: Mark needed resolves when first enabling HiZ on a miptree
  intel: Resolve buffers in intel_map_texture_image()
  intel: Resolve buffers in intel_map_renderbuffer()
  intel: Enable HiZ for texture renderbuffers
  intel: Store miptree alignment units in the miptree
  i965: Set vertical alignment in SURFACE_STATE batch
  intel: Use separate stencil whenever possible
  i965/gen6: Enable HiZ by default
  i965: Document where Piglit test glean/fbo breaks due to HiZ

Kenneth Graunke (1):
  i965: Implement the actual tables for texture alignment units.

 src/mesa/drivers/dri/i915/i830_vtbl.c             |    9 -
 src/mesa/drivers/dri/i915/i915_vtbl.c             |    9 -
 src/mesa/drivers/dri/i965/Makefile.sources        |    1 +
 src/mesa/drivers/dri/i965/brw_context.c           |   76 ++++
 src/mesa/drivers/dri/i965/brw_context.h           |   35 ++
 src/mesa/drivers/dri/i965/brw_defines.h           |    9 +-
 src/mesa/drivers/dri/i965/brw_draw.c              |  105 +++++-
 src/mesa/drivers/dri/i965/brw_misc_state.c        |   22 +-
 src/mesa/drivers/dri/i965/brw_tex_layout.c        |   43 +--
 src/mesa/drivers/dri/i965/brw_vtbl.c              |   37 +--
 src/mesa/drivers/dri/i965/brw_wm_surface_state.c  |   10 +-
 src/mesa/drivers/dri/i965/gen6_clip_state.c       |   17 +
 src/mesa/drivers/dri/i965/gen6_depthstencil.c     |   22 +-
 src/mesa/drivers/dri/i965/gen6_hiz.c              |  315 +++++++++++++-
 src/mesa/drivers/dri/i965/gen6_hiz.h              |   16 +-
 src/mesa/drivers/dri/i965/gen6_sf_state.c         |   15 +-
 src/mesa/drivers/dri/i965/gen6_wm_state.c         |   17 +
 src/mesa/drivers/dri/i965/gen7_misc_state.c       |   11 +-
 src/mesa/drivers/dri/i965/gen7_wm_surface_state.c |    2 +-
 src/mesa/drivers/dri/i965/intel_resolve_map.c     |    1 +
 src/mesa/drivers/dri/intel/intel_blit.c           |   21 +-
 src/mesa/drivers/dri/intel/intel_buffer_objects.c |    8 +-
 src/mesa/drivers/dri/intel/intel_buffers.c        |    9 +-
 src/mesa/drivers/dri/intel/intel_context.c        |   61 ++-
 src/mesa/drivers/dri/intel/intel_context.h        |   13 +-
 src/mesa/drivers/dri/intel/intel_fbo.c            |  490 +++++++++++++--------
 src/mesa/drivers/dri/intel/intel_fbo.h            |   92 +++--
 src/mesa/drivers/dri/intel/intel_mipmap_tree.c    |  484 +++++++++++++++++----
 src/mesa/drivers/dri/intel/intel_mipmap_tree.h    |  211 ++++++++-
 src/mesa/drivers/dri/intel/intel_pixel_copy.c     |    5 +-
 src/mesa/drivers/dri/intel/intel_resolve_map.c    |   95 ++++
 src/mesa/drivers/dri/intel/intel_resolve_map.h    |   99 +++++
 src/mesa/drivers/dri/intel/intel_screen.c         |   11 +-
 src/mesa/drivers/dri/intel/intel_span.c           |  149 ++++---
 src/mesa/drivers/dri/intel/intel_tex.c            |   46 +-
 src/mesa/drivers/dri/intel/intel_tex_copy.c       |   14 +-
 src/mesa/drivers/dri/intel/intel_tex_image.c      |  132 +------
 src/mesa/drivers/dri/intel/intel_tex_layout.c     |  121 +++++-
 src/mesa/drivers/dri/intel/intel_tex_layout.h     |   10 +-
 src/mesa/drivers/dri/intel/intel_tex_obj.h        |   30 --
 src/mesa/drivers/dri/intel/intel_tex_validate.c   |    7 +-
 41 files changed, 2100 insertions(+), 780 deletions(-)
 create mode 120000 src/mesa/drivers/dri/i965/intel_resolve_map.c
 create mode 100644 src/mesa/drivers/dri/intel/intel_resolve_map.c
 create mode 100644 src/mesa/drivers/dri/intel/intel_resolve_map.h

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1.7.7.1